Space and power-saving multiple output regulation circuitry

• US 10,001,797 B2
• Filed: 07/25/2016
• Issued: 06/19/2018
• Est. Priority Date: 07/25/2016
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Inventors: Sabbineni, Srinivasa Rao, Odedara, Bhavin, Thimmaiah, Jayanth Mysore
• Primary Examiner(s): Berhane, Adolf
• Assistant Examiner(s): Quddus, Nusrat
• Application Number:
  US15/218,566
• Publication Number:
  US 20180024581A1
• Time in Patent Office: 694 Days
• Field of Search: 323271-285, 323315
• CPC Class Codes: G05F 1/577 for plural loads
• CPC Class Codes: G05F 1/595 semiconductor devices connected in series

Abstract

Regulator circuitry may include a plurality of output circuits to generate a plurality of regulated output voltages. The regulator circuitry may include a single operational amplifier and a single feedback loop for regulation, which may reduce space and power consumed by the regulator circuitry. A transconductor and current mirror circuitry may be included to generate the plurality of regulated output voltages based a single operational amplifier output voltage generated with the single operational amplifier and feedback loop.

Claims

1. Circuitry comprising:

a transconductor circuit configured to generate a transconductor current based on an amount of difference between a reference voltage and a feedback voltage;

current mirror circuitry configured to;

generate a plurality of mirrored currents based on the transconductor current; and

supply the plurality or mirrored currents to a plurality of resistors; and

a plurality of output circuits configured to generate a plurality of regulated output voltages based on the plurality of mirrored currents,

wherein each of the plurality of output circuits is configured to generate a respective one of the regulated output voltages based on a corresponding one of the plurality of resistors.

2. The circuitry of claim 1, wherein the current mirror circuitry comprises cascode current mirror circuitry.

3. The circuitry of claim 2, wherein the cascode current mirror circuitry comprises p-channel metal-oxide-semiconductor field-effect transistors.

4. The circuitry of claim 1, wherein the current mirror circuitry comprises a plurality of output arms equal in number to a number of the plurality of output circuits.

5. The circuitry of claim 1, wherein the transconductor circuit is configured to supply the transconductor current to a second resistor, and wherein each of the plurality of regulated output voltages is generated further based on the second resistor.

6. The circuitry of claim 5, wherein the feedback voltage is generated based on a third resistor and a fourth resistor, and wherein each of the regulated output voltages is generated further based on the third resistor and the fourth resistor.

7. The circuitry of claim 5, further comprising an operational amplifier circuit configured to generate an operational amplifier voltage based on the amount of difference between the reference voltage and the feedback voltage, and

wherein the transconductor circuit is configured to generate the transconductor current in response to receipt of the operational amplifier voltage and a voltage generated across the second resistor.

8. The circuitry of claim 5, wherein the plurality of resistors are adjustable.

9. Circuitry comprising:

an operational amplifier configured to generate an operational amplifier voltage in response to receipt of a feedback voltage and a reference voltage;

a feedback circuit configured to generate a feedback circuit output voltage in response to receipt of the operational amplifier voltage;

a feedback loop configured to generate the feedback voltage based on a first resistor, a second resistor, and the feedback circuit output voltage;

current mirror circuitry configured to generate a plurality of mirrored currents based on the operational amplifier voltage; and

a plurality of output circuits, each configured to generate one of a plurality of regulated output voltages based on the first resistor, the second resistor, and a respective one of the plurality of mirrored currents.

10. The circuitry of claim 9, further comprising:

a transconductor circuit coupled to an output of the operational amplifier and configured to generate a transconductor current in response to receipt of the operational amplifier voltage,

wherein the current mirror circuitry is configured to generate the plurality of mirrored currents based on the transconductor current.

11. The circuitry of claim 10, wherein the current mirror circuitry is configured to:

generate the plurality of mirrored currents based on the transconductor current.

12. The circuitry of claim 11, wherein the current mirror circuitry comprises cascode mirror circuitry.

13. The circuitry of claim 9, wherein the current mirror circuitry is configured to supply the plurality of mirrored currents to a plurality of third resistors, and wherein each of the plurality of regulated output voltages is generated further based on a corresponding one of the plurality of third resistors.

14. The circuitry of claim 13, wherein the transconductor circuit is configured to supply the transconductor current to a fourth resistor, and wherein each of the plurality of regulated output voltages is generated further based on the fourth resistor.

15. Regulator circuitry comprising:

means for generating a transconductor current based on an amount of difference between a reference voltage and a feedback voltage;

means for generating a plurality of mirrored currents based on the transconductor current;

means for supplying the plurality of mirrored currents to a plurality of resistors; and

means for generating each of a plurality of regulated output voltages based on the plurality of mirrored currents and a corresponding one of the plurality of resistors.

16. Circuitry comprising:

an operational amplifier circuit configured to generate an amplifier output voltage in response to receipt of a reference voltage and a feedback voltage;

a transconductor circuit configured to;

generate a transconductor current in response to receipt of the operational amplifier output voltage; and

supply the transconductor current to a first resistor;

current mirror circuitry configured to;

mirror the transconductor current to generate a plurality of mirrored currents; and

supply the plurality of mirrored currents to a plurality of second resistors; and

a plurality of output circuits, each configured to generate a respective one of a plurality of regulated output voltages based on a resistance of the first resistor and a resistance of an associated one of the plurality of second resistors.

17. The circuitry of claim 16, further comprising:

a feedback circuit configured to generate, based on the operational amplifier output voltage, a feedback circuit output voltage on a feedback loop that connects back to the first operational amplifier circuit.

18. The circuitry of claim 16, wherein the plurality of second resistors are configured to generate a plurality of voltages in response to receipt of the plurality of mirrored currents,

wherein the plurality of output circuits are further configured to:

receive the plurality of voltages; and

generate the plurality of regulated output voltages based on the plurality of voltages generated with the plurality of second resistors.

19. The circuitry of claim 18, wherein each of the plurality of output circuits is configured to generate the respective one of the plurality of regulated output voltages based on a ratio of the resistance of the associated one of the plurality of second resistors to the resistance of the first resistor.

20. The circuitry of claim 16, wherein the current mirror circuitry is configured to mirror the transconductor current a number of times equal to the number of the plurality of output circuits.