Data processing device
First Claim
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1. A data processing device executing a division instruction, the data processing device comprising:
- an instruction decoder configured to decode an instruction code with the division instruction for operating on data, the instruction decoder further configured to determine whether the data is signed data;
a controller for determining shift width and, when the data is signed data, determining whether the data is negative signed data or positive signed data; and
an operation unit performing the arithmetic instruction for a number of cycles based on the shift width determined by the controller;
wherein the controller determines shift width and whether the data is negative signed data or positive signed data as part of execution of the division instruction by the data processing device.
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Abstract
A data processing device has an instruction decoder, a control logic unit, and ALU. The instruction decoder decodes instruction codes of an arithmetic instruction. The control logic unit detects the effective data width of operation data to be processed according to the decode result from the instruction decoder and determines the number of cycles for the instruction execution corresponding to the effective, data width. The ALU executes the instruction with the number of cycles of the instruction execution determined by the control logic unit.
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Citations
124 Claims
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1. A data processing device executing a division instruction, the data processing device comprising:
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an instruction decoder configured to decode an instruction code with the division instruction for operating on data, the instruction decoder further configured to determine whether the data is signed data; a controller for determining shift width and, when the data is signed data, determining whether the data is negative signed data or positive signed data; and an operation unit performing the arithmetic instruction for a number of cycles based on the shift width determined by the controller; wherein the controller determines shift width and whether the data is negative signed data or positive signed data as part of execution of the division instruction by the data processing device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for executing a division instruction in a data processing device, the method comprising the steps of:
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decoding an instruction code with the division instruction for operating on data; determining whether the data is signed data; determining shift width; determining, when the data is signed data, whether the data is negative signed data or positive signed data; and performing the arithmetic instruction for a number of cycles based on the shift width; wherein determining the shift width and determining whether the data is negative signed data or positive signed data is part of execution of the division instruction by the data processing device. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A data processing device executing arithmetic instructions, the data processing device comprising:
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a decoder decoding instructions, including a division instruction, the division instruction including storage register information identifying a register containing a dividend value; a controller determining a position of a first effective bit of the dividend value as part of execution of the division instruction by the data processing device; and an operation unit performing the division instruction to calculate a quotient value, wherein a number of cycles for performing the division instruction is based on the position of the first effective bit of the dividend value. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
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25. A method of executing arithmetic instructions in a data processing device, the method comprising the steps of:
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decoding a division instruction, the division instruction including storage register information identifying a register containing a dividend value; determining a position of a first effective bit of the dividend value as part of execution of the division instruction; and performing the division instruction to calculate a result, wherein a number of cycles for performing the division instruction is based on the position of the first effective bit of the dividend value. - View Dependent Claims (26, 27, 28, 29, 30, 31, 32)
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33. A data processing device executing instruction codes, the data processing device comprising:
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an instruction decoder that decodes an instruction code specifying a division instruction and identifying a storage register containing a dividend value; and a control logic unit that determines a first effective bit of the dividend value and performs the division instruction to calculate a quotient, wherein the control logic unit determines the first effective bit of the dividend value as part of the execution of the instruction code; wherein a number of cycles for completing the instruction code specifying the division instruction is based on the determined first effective bit of the dividend value. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40)
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41. A method for executing instruction codes in a data processing device, the method comprising the steps of:
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decoding an instruction code specifying a division instruction; identifying a storage register containing a dividend value; determining a first effective bit of the dividend value; and executing the division instruction to calculate a quotient; wherein the determination of the first effective bit of the dividend value is part of the execution of the instruction code; wherein a number of cycles for completing the instruction code specifying the division instruction is based on the determined first effective bit of the dividend value. - View Dependent Claims (42, 43, 44, 45, 46, 47, 48)
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49. A data processing device for executing instruction codes, the data processing device comprising:
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an instruction decoder that decodes an instruction code, the instruction code including a division instruction and information identifying a storage register containing a dividend value; and a control logic unit that determines a shift width based on a position of a first effective bit of the dividend value and performs the division instruction to calculate a quotient, wherein the control logic unit determines the first effective bit of the dividend as part of the execution of the instruction code; wherein a number of cycles for completing the division instruction varies based on the determined first effective bit of the dividend value. - View Dependent Claims (50, 51, 52, 53, 54)
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55. A method for executing instruction codes on a data processing device, the method comprising the steps of:
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decoding an instruction code, the instruction code specifying a division operation and information identifying a storage register containing a dividend value; determining a shift width based on a position of a first effective bit of the dividend value; and performing the division operation to calculate a quotient; wherein the determination of the first effective bit of the dividend value is part of the execution of the instruction code by the data processing device; wherein a number of cycles for completing execution of the division operation varies based on the determined first effective bit of the dividend value. - View Dependent Claims (56, 57, 58, 59, 60)
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61. A data processing device for executing instruction codes, the data processing device comprising:
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a divider circuit executing a division instruction on a dividend value for a number of cycles, the division instruction and the dividend value being included in an instruction code; and a controller for determining a bit location of a first effective bit of the dividend value, the bit location being determined during execution of the instruction code; wherein the number of cycles in which the divider circuit performs the division instruction is based on the determination of the bit location in the dividend value that includes the first effective bit. - View Dependent Claims (62, 63, 64, 65, 66, 67)
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68. A method for executing instruction codes on a data processing device, the method comprising the steps of:
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performing a division instruction on a dividend value for a number of cycles, the division instruction and the dividend value being included in an instruction code; and determining a bit location of a first effective bit of the dividend value, the bit location being determined during execution of the instruction code; wherein the number of cycles used to perform the division instruction varies based on the determined bit location in the dividend value that includes the first effective bit. - View Dependent Claims (69, 70, 71, 72, 73, 74)
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75. A data processing device comprising:
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a register containing a dividend value, the dividend value having effective data and uneffective data; a divider circuit for executing an arithmetic instruction, the divider circuit executing the arithmetic instruction on the effective data of the dividend value for a number of cycles; and a controller for determining a first bit location of the uneffective data of the dividend value; wherein the number of cycles executed by the divider circuit to generate a quotient depends on the first bit location of the uneffective data of the dividend value. - View Dependent Claims (76, 77, 78, 79, 80, 81)
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82. A method for executing a division instruction on a data processing device, the method comprising the steps of:
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determining a first bit location of uneffective data of a dividend value, the dividend value comprising effective and uneffective data; and executing the division instruction on the effective data of the dividend value for a number of cycles; wherein the number of cycles executed depends on the first bit location of the uneffective data of the dividend value. - View Dependent Claims (83, 84, 85, 86, 87, 88)
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89. A data processing device executing an arithmetic instruction, the device comprising:
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an instruction decoder decoding an instruction code to determine the arithmetic instruction; a controller reading a data value and determining a bit location of at least one effective bit of the data value involved in the arithmetic instruction; and a divider circuit performing the arithmetic instruction on effective bits of the data value; wherein the controller determines the bit location as part of the execution of the arithmetic instruction on the data value; wherein the operation unit executes the arithmetic instruction on effective bits of the data value based on the bit location determined by the controller; wherein the controller determines a shift width for the dividend value based on the bit location of the at least one effective bit of the data value. - View Dependent Claims (90, 91, 92, 93, 95, 96)
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94. A data processing device executing an arithmetic instruction, the device comprising:
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an instruction decoder decoding an instruction code to determine the arithmetic instruction; a controller reading a data value and determining a bit location of at least one effective bit of the data value involved in the arithmetic instruction; and a divider circuit performing the arithmetic instruction on effective bits of the data value; wherein the controller determines the bit location as part of the execution of the arithmetic instruction on the data value; wherein the operation unit executes the arithmetic instruction on effective bits of the data value based on the bit location determined by the controller; wherein the operation unit executes the arithmetic instruction for a number of cycles based on the bit location of at least one effective bit of the data value. - View Dependent Claims (117, 118, 119, 120)
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97. A method of executing an arithmetic instruction on a data value using a data processing device, the method comprising the steps of:
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decoding an instruction code to determine the arithmetic instruction; determining a bit location of at least one effective bit of the data value; and executing the arithmetic instruction on effective bits of the data value based on the bit location of the at least one effective bit of the data value; wherein the determination of the bit location is part of the execution of the arithmetic function on the data value; wherein the controller determines a shift width for the dividend value based on the bit location of the at least one effective bit of the data value. - View Dependent Claims (98, 99, 100, 101, 103, 104)
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102. A method of executing an arithmetic instruction on a data value using a data processing device, the method comprising the steps of:
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decoding an instruction code to determine the arithmetic instruction; determining a bit location of at least one effective bit of the data value; and executing the arithmetic instruction on effective bits of the data value based on the bit location of the at least one effective bit of the data value; wherein the determination of the bit location is part of the execution of the arithmetic function on the data value; wherein the arithmetic instruction is executed for a number of cycles based on the bit location of the at least one effective bit of the data value. - View Dependent Claims (121, 122, 123, 124)
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105. A data processing device executing an arithmetic instruction on a data value, the device comprising:
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a decoder decoding an instruction code to determine the arithmetic instruction to be performed on the data value; a controller determining a position of effective bits of the data value; and a divider circuit executing the arithmetic instruction on the effective bits of the data value based on the position of the effective bits determined by the controller; wherein the controller determines the position of effective bits of the data value as part of the execution of the arithmetic function on the data value; wherein the divider circuit performs the arithmetic instruction for a number of cycles based on the position of at least one effective bit of the data value. - View Dependent Claims (106, 107, 108, 109, 110)
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111. A method of executing an arithmetic instruction on a data value using a data processing device, the method comprising the steps of:
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decoding an instruction code to determine the arithmetic instruction to be performed on the data value; determining a position of effective bits of the data value; and executing the arithmetic instruction on the effective bits of the data value based on the position of the effective bits; wherein the determination of the position of effective bits of the data value occurs as part of the execution of the arithmetic function on the data value; wherein the performing of the arithmetic instruction occurs for a number of cycles based on the bit location of at least one effective bit of the data value. - View Dependent Claims (112, 113, 114, 115, 116)
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Specification