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Semiconductor integrated circuit device

  • US 10,002,832 B2
  • Filed: 04/21/2017
  • Issued: 06/19/2018
  • Est. Priority Date: 10/24/2014
  • Status: Active Grant
First Claim
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1. A semiconductor integrated circuit device comprising:

  • at least two I/O cell rows each including a plurality of I/O cells arranged in a first direction;

    a plurality of external connection pads; and

    a common power supply interconnect that connects together a plurality of first I/O cells configured either as I/O cells for supplying a power supply potential or as I/O cells for supplying a ground potential, the first I/O cells each included in a respective one of the at least two I/O cell rows, whereinthe first I/O cells connected together via the common power supply interconnect are arranged so as to overlap with each other in the first direction, andthe common power supply interconnect extends in a second direction perpendicular to the first direction, and is connected to a first pad which is one of the plurality of external connection pads and is located closest to the common power supply interconnect in the first direction among the plurality of external connection pads.

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