Logic circuit and semiconductor device
First Claim
Patent Images
1. A semiconductor device comprising:
- first to eighth transistors; and
first and second capacitors,wherein each of the first to eighth transistors includes an oxide semiconductor layer containing indium, gallium, and zinc as a semiconductor layer,wherein one of source and drain of the first transistor is electrically connected to one of source and drain of the second transistor,wherein one of source and drain of the third transistor is electrically connected to a gate of the first transistor,wherein one of source and drain of the fourth transistor is electrically connected to a gate of the second transistor,wherein a first electrode of the first capacitor is electrically connected to the gate of the first transistor,wherein a second electrode of the first capacitor is electrically connected to the other of source and drain of the first transistor,wherein one of source and drain of the fifth transistor is electrically connected to one of source and drain of the sixth transistor,wherein one of source and drain of the seventh transistor is electrically connected to a gate of the fifth transistor,wherein one of source and drain of the eighth transistor is electrically connected to a gate of the sixth transistor,wherein a first electrode of the second capacitor is electrically connected to the gate of the fifth transistor,wherein a second electrode of the second capacitor is electrically connected to the one of source and drain of the fifth transistor,wherein a power supply line is electrically connected to the other of source and drain of the second transistor,wherein the power supply line is electrically connected to the other of source and drain of the sixth transistor,wherein a first signal is output from the one of source and drain of the first transistor,wherein a second signal is output from the one of source and drain of the fifth transistor,wherein a third signal is input to the other of source and drain of the third transistor and the other of source and drain of the eighth transistor, andwherein a fourth signal is input to the other of source and drain of the fourth transistor and the other of source and drain of the seventh transistor.
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Abstract
Exemplary semiconductor devices include eight transistors and two capacitors interconnected in specific configurations. A display device may include a driver circuit having such a semiconductor device. An electronic device may also include such a semiconductor device and an input unit, LED lamp or speaker.
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Citations
16 Claims
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1. A semiconductor device comprising:
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first to eighth transistors; and first and second capacitors, wherein each of the first to eighth transistors includes an oxide semiconductor layer containing indium, gallium, and zinc as a semiconductor layer, wherein one of source and drain of the first transistor is electrically connected to one of source and drain of the second transistor, wherein one of source and drain of the third transistor is electrically connected to a gate of the first transistor, wherein one of source and drain of the fourth transistor is electrically connected to a gate of the second transistor, wherein a first electrode of the first capacitor is electrically connected to the gate of the first transistor, wherein a second electrode of the first capacitor is electrically connected to the other of source and drain of the first transistor, wherein one of source and drain of the fifth transistor is electrically connected to one of source and drain of the sixth transistor, wherein one of source and drain of the seventh transistor is electrically connected to a gate of the fifth transistor, wherein one of source and drain of the eighth transistor is electrically connected to a gate of the sixth transistor, wherein a first electrode of the second capacitor is electrically connected to the gate of the fifth transistor, wherein a second electrode of the second capacitor is electrically connected to the one of source and drain of the fifth transistor, wherein a power supply line is electrically connected to the other of source and drain of the second transistor, wherein the power supply line is electrically connected to the other of source and drain of the sixth transistor, wherein a first signal is output from the one of source and drain of the first transistor, wherein a second signal is output from the one of source and drain of the fifth transistor, wherein a third signal is input to the other of source and drain of the third transistor and the other of source and drain of the eighth transistor, and wherein a fourth signal is input to the other of source and drain of the fourth transistor and the other of source and drain of the seventh transistor. - View Dependent Claims (2, 3, 4)
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5. A semiconductor device comprising:
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first to eighth transistors; and first and second capacitors, wherein each of the first to eighth transistors includes an oxide semiconductor layer containing indium, gallium, and zinc as a semiconductor layer, wherein one of source and drain of the first transistor is electrically connected to one of source and drain of the second transistor, wherein one of source and drain of the third transistor is electrically connected to a gate of the first transistor, wherein one of source and drain of the fourth transistor is electrically connected to a gate of the second transistor, wherein a gate of the third transistor is electrically connected to a gate of the fourth transistor, wherein a first electrode of the first capacitor is electrically connected to the gate of the first transistor, wherein a second electrode of the first capacitor is electrically connected to the other of source and drain of the first transistor, wherein one of source and drain of the fifth transistor is electrically connected to one of source and drain of the sixth transistor, wherein one of source and drain of the seventh transistor is electrically connected to a gate of the fifth transistor, wherein one of source and drain of the eighth transistor is electrically connected to a gate of the sixth transistor, wherein a gate of the seventh transistor is electrically connected to a gate of the eighth transistor, wherein a first electrode of the second capacitor is electrically connected to the gate of the fifth transistor, wherein a second electrode of the second capacitor is electrically connected to the one of source and drain of the fifth transistor, wherein a power supply line is electrically connected to the other of source and drain of the second transistor, wherein the power supply line is electrically connected to the other of source and drain of the sixth transistor, wherein a first signal is output from the one of source and drain of the first transistor, wherein a second signal is output from the one of source and drain of the fifth transistor, wherein a third signal is input to the other of source and drain of the third transistor and the other of source and drain of the eighth transistor, and wherein a fourth signal is input to the other of source and drain of the fourth transistor and the other of source and drain of the seventh transistor. - View Dependent Claims (6, 7, 8)
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9. A semiconductor device comprising:
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first to eighth transistors; and first and second capacitors, wherein each of the first to eighth transistors includes an oxide semiconductor layer containing indium, gallium, and zinc as a semiconductor layer, wherein one of source and drain of the first transistor is directly connected to one of source and drain of the second transistor, wherein one of source and drain of the third transistor is directly connected to a gate of the first transistor, wherein one of source and drain of the fourth transistor is directly connected to a gate of the second transistor, wherein a first electrode of the first capacitor is directly connected to the gate of the first transistor, wherein a second electrode of the first capacitor is directly connected to the other of source and drain of the first transistor, wherein one of source and drain of the fifth transistor is directly connected to one of source and drain of the sixth transistor, wherein one of source and drain of the seventh transistor is directly connected to a gate of the fifth transistor, wherein one of source and drain of the eighth transistor is directly connected to a gate of the sixth transistor, wherein a first electrode of the second capacitor is directly connected to the gate of the fifth transistor, wherein a second electrode of the second capacitor is directly connected to the one of source and drain of the fifth transistor, wherein a power supply line is directly connected to the other of source and drain of the second transistor, wherein the power supply line is directly connected to the other of source and drain of the sixth transistor, wherein a first signal is output from the one of source and drain of the first transistor, wherein a second signal is output from the one of source and drain of the fifth transistor, wherein a third signal is input to the other of source and drain of the third transistor and the other of source and drain of the eighth transistor, and wherein a fourth signal is input to the other of source and drain of the fourth transistor and the other of source and drain of the seventh transistor. - View Dependent Claims (10, 11, 12)
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13. A semiconductor device comprising:
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first to eighth transistors; and first and second capacitor, wherein each of the first to eighth transistors includes an oxide semiconductor layer containing indium, gallium, and zinc as a semiconductor layer, wherein one of source and drain of the first transistor is directly connected to one of source and drain of the second transistor, wherein one of source and drain of the third transistor is directly connected to a gate of the first transistor, wherein one of source and drain of the fourth transistor is directly connected to a gate of the second transistor, wherein a gate of the third transistor is directly connected to a gate of the fourth transistor, wherein a first electrode of the first capacitor is directly connected to the gate of the first transistor, wherein a second electrode of the first capacitor is directly connected to the other of source and drain of the first transistor, wherein one of source and drain of the fifth transistor is directly connected to one of source and drain of the sixth transistor, wherein one of source and drain of the seventh transistor is directly connected to a gate of the fifth transistor, wherein one of source and drain of the eighth transistor is directly connected to a gate of the sixth transistor, wherein a gate of the seventh transistor is directly connected to a gate of the eighth transistor, wherein a first electrode of the second capacitor is directly connected to the gate of the fifth transistor, wherein a second electrode of the second capacitor is directly connected to the one of source and drain of the fifth transistor, wherein a power supply line is directly connected to the other of source and drain of the second transistor, wherein the power supply line is directly connected to the other of source and drain of the sixth transistor, wherein a first signal is output from the one of source and drain of the first transistor, wherein a second signal is output from the one of source and drain of the fifth transistor, wherein a third signal is input to the other of source and drain of the third transistor and the other of source and drain of the eighth transistor, and wherein a fourth signal is input to the other of source and drain of the fourth transistor and the other of source and drain of the seventh transistor. - View Dependent Claims (14, 15, 16)
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Specification