Apparatus and methods for power amplifier biasing

• US 10,003,308 B2
• Filed: 02/09/2017
• Issued: 06/19/2018
• Est. Priority Date: 08/01/2013
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Lam, Lui
• Primary Examiner(s): Nguyen, Hieu
• Application Number:
  US15/428,932
• Publication Number:
  US 20170155366A1
• Time in Patent Office: 495 Days
• Field of Search: 330285, 330296, 330289, 330295, 330124 R
• CPC Class Codes: H03F 1/0266 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/302 in bipolar transistor amplifiers H03F1/303, H03F1/305, H03F1/307 take precedence
• CPC Class Codes: H03F 1/34 Negative-feedback-circuit arrangements with or without positive feedback H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence ; for rejection of common mode signals H03F3/45479
• CPC Class Codes: H03F 2200/18 the bias of the gate of a FET being controlled by a control signal
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/408 the output amplifying stage of an amplifier comprising three power stages
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/21131 the input bias voltage of a power amplifier being controlled, e.g. by a potentiometer or an emitter follower
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/21 with semiconductor devices only H03F3/245 takes precedence
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H04L 25/06 Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
• CPC Class Codes: H04W 52/52 using AGC [Automatic Gain Control] circuits or amplifiers
• CPC Class Codes: H04W 88/06 adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals

Abstract

Apparatus and methods for power amplifier biasing are disclosed herein. In certain implementations, a power amplifier system includes a power amplifier bias circuit and a power amplifier. The power amplifier bias circuit includes a reference current source that generates a reference current, a bipolar reference transistor, and a transimpedance amplifier that amplifies a difference between a collector current of the bipolar reference transistor and the reference current, and that provides a base bias voltage to a base of the bipolar reference transistor. The power amplifier generates a radio frequency output signal at an output based on amplifying a radio frequency input signal received at an input. The power amplifier includes a bipolar power amplifier transistor including a base biased by the base bias voltage such that the power amplifier has a substantially flat gain response versus time.

Claims

1. A power amplifier system comprising:

a power amplifier bias circuit including a reference current source configured to generate a reference current, a bipolar reference transistor, and a transimpedance amplifier configured to amplify a difference between a collector current of the bipolar reference transistor and the reference current, and to provide a base bias voltage to a base of the bipolar reference transistor, the transimpedance amplifier further configured to receive an enable signal; and

a power amplifier configured to generate a radio frequency output signal at an output based on amplifying a radio frequency input signal received at an input, the power amplifier including a bipolar power amplifier transistor including a base biased by the base bias voltage such that the power amplifier has a substantially flat gain response versus time, the enable signal of the transimpedance amplifier operable to selectively pulse the output of the power amplifier.

2. The power amplifier system of claim 1 wherein the bipolar reference transistor is a scaled replica of the bipolar power amplifier transistor.

3. The power amplifier system of claim 1 wherein the reference current source is further configured to receive the enable signal.

4. The power amplifier system of claim 3 wherein the radio frequency input signal is a wireless local area network signal.

5. The power amplifier system of claim 1 further comprising an array of transistor elements, the bipolar power amplifier transistor implemented by a plurality of transistor elements of the array, and the bipolar reference transistor implemented by one or more transistor elements of the array.

6. The power amplifier system of claim 1 further comprising an antenna electrically coupled to the output of the power amplifier via switches.

7. The power amplifier system of claim 1 wherein the reference current source is variable.

8. The power amplifier system of claim 7 further comprising a control circuit configured to control the reference current to compensate for temperature variation.

9. The power amplifier system of claim 1 wherein the bipolar reference transistor and the bipolar power amplifier transistor are separated by less than about 9 μ

m to provide thermal coupling.

10. The power amplifier system of claim 1 further comprising a transceiver configured to provide the radio frequency input signal to the input of the power amplifier.

11. A method of power amplifier biasing, the method comprising:

generating a reference current using a reference current source;

amplifying a difference between a collector current of a bipolar reference transistor and the reference current using a transimpedance amplifier;

providing a base bias voltage from an output of the transimpedance amplifier to a base of the bipolar reference transistor;

amplifying a radio frequency input signal to generate a radio frequency output signal using a power amplifier that includes a bipolar power amplifier transistor;

biasing a base of the bipolar power amplifier transistor using the base bias voltage such that the power amplifier has a substantially flat gain response versus time; and

pulsing the radio frequency output signal of the power amplifier using an enable signal of the transimpedance amplifier.

12. The method of claim 11 further comprising providing the enable signal to the reference current source.

13. The method of claim 11 wherein the reference current source is variable, the method further comprising controlling the reference current to compensate for temperature variation.

14. The method of claim 11 further comprising using negative feedback to control the collector current to substantially equal the reference current.

15. A packaged module comprising:

a package substrate; and

an integrated circuit attached to the package substrate, the integrated circuit including a reference current source configured to generate a reference current, a bipolar reference transistor, and a transimpedance amplifier configured to amplify a difference between a collector current of the bipolar reference transistor and the reference current, and to provide a base bias voltage to a base of the bipolar reference transistor, the integrated circuit further including a power amplifier configured to generate a radio frequency output signal based on amplifying a radio frequency input signal, the power amplifier including a bipolar power amplifier transistor including a base biased by the base bias voltage such that the power amplifier has a substantially flat gain response versus time, the transimpedance amplifier further configured to receive an enable signal operable to selectively pulse the radio frequency output signal of the power amplifier.

16. The packaged module of claim 15 wherein the bipolar reference transistor is a scaled replica of the bipolar power amplifier transistor.

17. The packaged module of claim 15 wherein the integrated circuit further includes an array of transistor elements, the bipolar power amplifier transistor implemented by a plurality of transistor elements of the array, and the bipolar reference transistor implemented by one or more transistor elements of the array.

18. The packaged module of claim 15 wherein the reference current source is variable.

19. The packaged module of claim 18 further comprising a control circuit configured to control the reference current to compensate for temperature variation.

20. The packaged module of claim 15 wherein the bipolar reference transistor and the bipolar power amplifier transistor are separated by less than about 9 μ

m to provide thermal coupling.