Bus reversible orthogonal differential vector signaling codes
First Claim
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1. A method comprising:
- receiving a set of input bits and responsively generating a set of symbols of a codeword based on the set of input bits and a P-amenable orthogonal matrix, the P-amenable orthogonal matrix based on orthogonal generating matrix and a permutation matrix P; and
,forming a set of permuted symbols using a multi-wire transmission bus, wherein the set of permuted symbols represents a wire permutation of the set of symbols of the codeword, the wire permutation based on the permutation matrix P, the permutation matrix P associated with the multi-wire transmission bus; and
transmitting the set of permuted symbols on the multi-wire transmission bus.
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Abstract
Properties and the construction method of Orthogonal Differential Vector Signaling Codes are disclosed which are tolerant of order-reversal, as may occur when physical routing of communications channel wires causes the bus signal order to be reversed. Operation using the described codes with such bus-reversed signals can avoid complete logical or physical reordering of received signals or other significant duplication of receiver resources.
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Citations
20 Claims
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1. A method comprising:
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receiving a set of input bits and responsively generating a set of symbols of a codeword based on the set of input bits and a P-amenable orthogonal matrix, the P-amenable orthogonal matrix based on orthogonal generating matrix and a permutation matrix P; and
,forming a set of permuted symbols using a multi-wire transmission bus, wherein the set of permuted symbols represents a wire permutation of the set of symbols of the codeword, the wire permutation based on the permutation matrix P, the permutation matrix P associated with the multi-wire transmission bus; and transmitting the set of permuted symbols on the multi-wire transmission bus. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification