Testing and setting performance parameters in a semiconductor device and method therefor

• US 10,006,959 B2
• Filed: 09/12/2014
• Issued: 06/26/2018
• Est. Priority Date: 08/20/2014
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Darryl G. Walker
• Inventors: Walker, Darryl G.
• Primary Examiner(s): Poos, John
• Application Number:
  US14/484,546
• Publication Number:
  US 20160054377A1
• Time in Patent Office: 1,383 Days
• Field of Search: 327109, 327434, 327543
• CPC Class Codes: G01R 31/2628 for measuring thermal properties thereof
• CPC Class Codes: G01R 31/2856 Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
• CPC Class Codes: G01R 31/2875 related to heating
• CPC Class Codes: G01R 31/50 Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections testing of sparking plugs H01T13/58
• CPC Class Codes: G11C 11/40615 Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
• CPC Class Codes: G11C 11/40626 Temperature related aspects of refresh operations
• CPC Class Codes: G11C 2029/5002 Characteristic
• CPC Class Codes: G11C 29/006 at wafer scale level, i.e. wafer scale integration [WSI]
• CPC Class Codes: G11C 29/023 in clock generator or timing circuitry
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/50 Marginal testing, e.g. race, voltage or current testing
• CPC Class Codes: G11C 29/50016 of retention
• CPC Class Codes: G11C 7/04 with means for avoiding disturbances due to temperature effects

Abstract

A method of determining temperature ranges and setting performance parameters in a semiconductor device that may include at least one temperature sensing circuit is disclosed. The temperature sensing circuits may be used to control various operating parameters to improve the operation of the semiconductor device over a wide temperature range. The performance parameters may be set to improve speed parameters and/or decrease current consumption over a wide range of temperature ranges.

Claims

1. A device, comprising:

a temperature sensor circuit setting a temperature range in response to a count value provided by a counter circuit;

a buffer circuit having an input terminal coupled to receive the count value and provide the count value external to the device; and

a pass gate circuit providing a controllable impedance path between the count value provided by the counter circuit and the input terminal of the buffer circuit, the pass gate circuit coupled to receive a first test signal at a pass gate control terminal.

2. The device of claim 1, wherein:

the pass gate circuit coupled to receive an input enable signal at a second pass gate control terminal.

3. The device of claim 1, wherein:

the pass gate circuit includes complementary insulated gate field effect transistors (IGFETs) having source/drain terminals coupled in parallel between the count value provided by the counter circuit and the input terminal of the buffer circuit.

4. A device, comprising:

a temperature sensor circuit setting a temperature range in response to a count value provided by a counter circuit;

a buffer circuit having an input terminal coupled to receive the count value and provide the count value external to the device; and

a performance parameter table coupled to receive the count value and provide performance parameters.

5. The device of claim 4, further including:

operational circuits coupled to receive the performance parameters.

6. The device of claim 5, wherein:

the operational circuits include

latch circuits coupled to receive the performance parameters and provide latched performance parameters; and

performance parameter adjustable circuits coupled to receive the latched performance parameters.

7. The device of claim 6, wherein:

the latch circuits are coupled to receive a load signal and the latch circuits provide latched performance parameters in response to the load signal.

8. The device of claim 6, wherein:

the performance parameter adjustable circuits include subthreshold voltage operating circuits including at least one first insulated gate field effect transistor (IGFET) having a first conductivity type and a first IGFET threshold voltage, the subthreshold voltage operating circuits operate from a power supply having a potential less than the first IGFET threshold voltage.

9. The device of claim 8, wherein:

the at least one first IGFET is coupled to receive a first back body bias potential having a potential determined by the latched performance parameters.

10. The device of claim 9, further including:

a first back bias voltage generating circuit coupled to receive at least one of the latched performance parameters and provide the first back body bias potential.

11. The device of claim 9, wherein:

the subthreshold voltage operating circuits including at least one second IGFET having a second conductivity type; and

the at least one second IGFET having the second conductivity type is coupled to receive a second back body bias potential having a potential determined by the latched performance parameters.

12. The device of claim 11, further including:

a second back bias voltage generating circuit coupled to receive at least one of the latched performance parameters and provide the second back body bias potential.

13. The device of claim 8, wherein:

the performance parameter adjustable circuits further include above subthreshold voltage operating circuits including at least one third IGFET having the first conductivity type and a third IGFET threshold voltage, the above subthreshold voltage operating circuits operate from a second power supply having a potential greater than the third IGFET threshold voltage.

14. The device of claim 13, wherein:

the at least one third IGFET is coupled to receive a third back body bias potential having a potential determined by the latched performance parameters.

15. The device of claim 14, wherein:

the above subthreshold voltage operating circuits including at least one fourth IGFET having the second conductivity type; and

the at least one fourth IGFET having the second conductivity type is coupled to receive a fourth back body bias potential having a potential determined by the latched performance parameters.

16. The device of claim 4, wherein:

the device is a semiconductor device.

18. The device of claim 16, wherein:

the semiconductor device is a semiconductor memory device.

17. A device, comprising:

a temperature sensor circuit setting a temperature range in response to a count value provided by a counter circuit; and

a buffer circuit having an input terminal coupled to receive the count value and provide the count value external to the device;

wherein

the device is a semiconductor processor device.

19. The device of claim 17, further including:

operational circuits coupled to receive performance parameters,

the operational circuits including

latch circuits coupled to receive the performance parameters and provide latched performance parameters; and

performance parameter adjustable circuits coupled to receive the latched performance parameters.

20. The device of claim 19, wherein:

the performance parameter adjustable circuits include subthreshold voltage operating circuits including at least one first insulated gate field effect transistor (IGFET) having a first conductivity type and a first IGFET threshold voltage, the subthreshold voltage operating circuits operate from a power supply having a potential less than the first IGFET threshold voltage.