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Platform power consumption reduction via power state switching

  • US 10,007,323 B2
  • Filed: 12/23/2013
  • Issued: 06/26/2018
  • Est. Priority Date: 12/26/2012
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • control logic, the control logic at least partially comprising hardware logic, to cause a processor to enter a first low power consumption state instead of a second low power consumption state based on a threshold time period between a first wake event and a second wake event,wherein the first low power consumption state is to consume more power than the second low power consumption state, wherein the control logic is to determine whether the processor is to enter the first low power consumption state based on a scenario, wherein the scenario is to comprise a display self-refresh scenario, wherein the first wake event or the second wake event are to each correspond to one of a plurality of awake requests, wherein the processor is to enter the first low power consumption state based on one of the plurality of awake requests, wherein each of the plurality of awake requests is to cause one or more platform resources to stay powered on or awake, wherein each of the plurality of awake requests is to cause prevention of entry into the second low power consumption state for as long as the one or more awake requests are active.

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