Single level cell write buffering for multiple level cell non-volatile memory
First Claim
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1. An apparatus comprising:
- non-volatile memory to include a first region in a Single Level Cell (SLC) mode, a second region in a multiple level cell (MLC) mode, and a third region in the MLC mode, wherein the third region is to be unexposed as user addressable space; and
logic to move a portion of the second region from the multiple level cell mode to the SLC mode, wherein the portion of the second region is capable to enter into the SLC mode based on status of at least one bit, wherein each time one or more new blocks are opened for writing, they are to be opened in SLC mode and once a write idle threshold is met, content from one or more SLC blocks are to be garbage collected to one or more MLC blocks, wherein burst write operations are to be directed at the second region in response to a threshold number of burst write operations directed at the first region.
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Abstract
Methods and apparatus related to cost optimized Single Level Cell (SLC) write buffering for Three Level Cell (TLC) Solid State Drives (SSDs) are described. In one embodiment, non-volatile memory includes a first region in a Single Level Cell (SLC) mode and a second region in a multiple level cell mode. A portion of the second region is moved from the multiple level cell mode to the SLC mode, without adding any new capacity to the non-volatile memory and without reducing any existing capacity from the non-volatile memory.
43 Citations
25 Claims
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1. An apparatus comprising:
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non-volatile memory to include a first region in a Single Level Cell (SLC) mode, a second region in a multiple level cell (MLC) mode, and a third region in the MLC mode, wherein the third region is to be unexposed as user addressable space; and logic to move a portion of the second region from the multiple level cell mode to the SLC mode, wherein the portion of the second region is capable to enter into the SLC mode based on status of at least one bit, wherein each time one or more new blocks are opened for writing, they are to be opened in SLC mode and once a write idle threshold is met, content from one or more SLC blocks are to be garbage collected to one or more MLC blocks, wherein burst write operations are to be directed at the second region in response to a threshold number of burst write operations directed at the first region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method comprising:
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partitioning non-volatile memory to include a first region in a Single Level Cell (SLC) mode, a second region in a multiple level cell (MLC) mode, and a third region in the MLC mode, wherein the third region is unexposed as user addressable space; and moving a portion of the second region from the multiple level cell mode to the SLC mode, wherein the portion of the second region is capable to enter into the SLC mode based on status of at least one bit, wherein each time one or more new blocks are opened for writing, they are opened in SLC mode and once a write idle threshold is met, content from one or more SLC blocks are garbage collected to one or more MLC blocks, wherein burst write operations are directed at the second region in response to a threshold number of burst write operations directed at the first region. - View Dependent Claims (13, 14, 15, 16, 17)
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18. A system comprising:
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non-volatile memory; and at least one processor core to access the non-volatile memory; the non-volatile memory to include a first region in a Single Level Cell (SLC) mode and a second region in a multiple level cell (MLC) mode, and a third region in the MLC mode, wherein the third region is to be unexposed as user addressable space; and logic to move a portion of the second region from the multiple level cell mode to the SLC mode, wherein the portion of the second region is capable to enter into the SLC mode based on status of at least one bit, wherein each time one or more new blocks are opened for writing, they are to be opened in SLC mode and once a write idle threshold is met, content from one or more SLC blocks are to be garbage collected to one or more MLC block, wherein burst write operations are to be directed at the second region in response to a threshold number of burst write operations directed at the first region. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25)
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Specification