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Oxidation resistant barrier metal process for semiconductor devices

  • US 10,008,450 B2
  • Filed: 06/07/2017
  • Issued: 06/26/2018
  • Est. Priority Date: 12/18/2015
  • Status: Active Grant
First Claim
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1. An integrated circuit, comprising:

  • an underlying metal geometry;

    a dielectric layer on the underlying metal geometry;

    a contact opening through the dielectric layer wherein the contact opening stops on the underlying metal geometry;

    an overlying metal geometry wherein a portion of the overlying metal geometry fills a portion of the contact opening;

    an oxidation resistant barrier layer wherein the oxidation resistant barrier layer is disposed between the underlying metal geometry and overlying metal geometry and wherein the oxidation resistant barrier layer is formed of tantalum-nitride (TaN) or titanium-nitride (TiN) with a nitrogen content of at least 20 atomic % and a thickness of at least 5 nm; and

    an interdiffusion barrier layer disposed between the underlying metal geometry and the oxidation resistant barrier layer, wherein the interdiffusion barrier layer is TaN or TiN with a thickness between 60 nm and 90 nm and a nitrogen content between 0 and 12 atomic percent.

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