Semiconductor device and method of manufacturing the same
First Claim
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1. A method of manufacturing a semiconductor device, the method comprising:
- forming a plurality of sacrificial layers and a plurality of semiconductor layers on a substrate, the semiconductor layers and the sacrificial layers being repeatedly and alternately stacked on the substrate;
partially removing the sacrificial layers;
forming spacers in removed regions of the sacrificial layers; and
replacing remaining portions of the sacrificial layers with a gate electrode,wherein each of the sacrificial layers includes first portions disposed adjacent to the semiconductor layers and a second portion disposed between the first portions, the second portion having a different composition from the first portions,wherein the sacrificial layers include silicon germanium, and a germanium content of the first portions is higher than a germanium content of the second portion, andwherein the first portions include impurities.
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Abstract
A method of manufacturing semiconductor device includes forming a plurality of sacrificial layers and a plurality of semiconductor layers repeatedly and alternately stacked on a substrate, partially removing the sacrificial layers, forming spacers in removed regions of the sacrificial layers, and replacing remaining portions of the sacrificial layers with a gate electrode. Each of the sacrificial layers includes first portions disposed adjacent to the plurality of semiconductor layers and a second portions disposed between the first portions. The second portion having a different composition from the first portions.
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Citations
15 Claims
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1. A method of manufacturing a semiconductor device, the method comprising:
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forming a plurality of sacrificial layers and a plurality of semiconductor layers on a substrate, the semiconductor layers and the sacrificial layers being repeatedly and alternately stacked on the substrate; partially removing the sacrificial layers; forming spacers in removed regions of the sacrificial layers; and replacing remaining portions of the sacrificial layers with a gate electrode, wherein each of the sacrificial layers includes first portions disposed adjacent to the semiconductor layers and a second portion disposed between the first portions, the second portion having a different composition from the first portions, wherein the sacrificial layers include silicon germanium, and a germanium content of the first portions is higher than a germanium content of the second portion, and wherein the first portions include impurities. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of manufacturing a semiconductor device, the method comprising:
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forming, on a substrate, a fin structure in which a plurality of sacrificial patterns and a plurality of semiconductor patterns are alternately stacked on each other, wherein each of the sacrificial patterns includes a first portion disposed adjacent to each of the plurality of semiconductor patterns and a second portion having a different composition from the first portion; forming a dummy gate on the fin structure; forming a first spacer on opposite sidewalls of the dummy gate; etching the sacrificial patterns and the semiconductor patterns using the dummy gate and the first spacer as an etch mask to form a plurality of sacrificial sheets and a plurality of nanosheets; etching sidewalls of the sacrificial sheets to form a spacer space; forming a second spacer in the spacer space; forming a source/drain region connected to the nanosheets; removing the dummy gate and the sacrificial sheets; forming a gate insulating layer; and forming a gate electrode, wherein each of the sacrificial patterns include silicon germanium, and a germanium content of the first portions is about 5% to about 10% higher than a germanium content of the second portion. - View Dependent Claims (9, 10, 11)
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12. A method of manufacturing a semiconductor device, the method comprising:
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forming a stacked structure disposed on a substrate, the stacked structure including a plurality of semiconductor layers and a plurality of sacrificial layers repeatedly and alternately stacked, wherein sidewalls of the sacrificial layers have a concave shape structure; forming spacers in spaces provided by the concave shape structures; removing the sacrificial layers to form openings; and forming a gate electrode in the openings, wherein each of the sacrificial layers includes first portions disposed adjacent to the semiconductor layers and a second portion disposed between the first portions, the second portion having a different composition from at least one of the first portions, and wherein a depth of the concave shape structure is less than about 2 nm. - View Dependent Claims (13, 14, 15)
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Specification