Method and structure to provide integrated long channel vertical FinFET device
First Claim
1. A method of making a vertical FinFET device comprising:
- forming a fin having a height (H) on a semiconductor substrate;
forming a well region in the substrate, where a lower end of the fin is in contact with the well region;
forming a bottom source/drain region in the substrate laterally adjacent to the well region and spaced away from the fin, forming a main gate stack over at least one sidewall of the fin, the main gate stack extending laterally over the well region and the bottom source/drain region on at least one side of the fin, wherein the main gate stack comprises a main gate dielectric and a main gate conductor formed over the main gate dielectric, andwherein the main gate dielectric is separated from the bottom source/drain region by a bottom spacer formed on the semiconductor substrate prior to forming of the main gate stack; and
etching a portion of the main gate conductor over the bottom source/drain region to define a channel region between the main gate conductor and the fin and between the main gate conductor and the well region.
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Abstract
A vertical fin field effect transistor includes a semiconductor fin disposed over a well region and a gate conductor layer disposed over a sidewall of the fin, and extending laterally over a top surface of the well region adjacent to the fin. The extension of the gate conductor over the bottom source/drain effectively increases the channel length of the vertical FinFET device independent of the fin height. A bottom source/drain region is laterally adjacent to the well region such that the portion of the well region covered by the laterally extended gate stack is between the bottom source/drain region and the portion of the well region immediately under the fin. A top source/drain region is located above the fin. The device is operated in circuits by use of electrical contacts to the bottom source/drain, the gate conductor, and the top source/drain.
12 Citations
9 Claims
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1. A method of making a vertical FinFET device comprising:
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forming a fin having a height (H) on a semiconductor substrate; forming a well region in the substrate, where a lower end of the fin is in contact with the well region; forming a bottom source/drain region in the substrate laterally adjacent to the well region and spaced away from the fin, forming a main gate stack over at least one sidewall of the fin, the main gate stack extending laterally over the well region and the bottom source/drain region on at least one side of the fin, wherein the main gate stack comprises a main gate dielectric and a main gate conductor formed over the main gate dielectric, and wherein the main gate dielectric is separated from the bottom source/drain region by a bottom spacer formed on the semiconductor substrate prior to forming of the main gate stack; and etching a portion of the main gate conductor over the bottom source/drain region to define a channel region between the main gate conductor and the fin and between the main gate conductor and the well region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification