Storage device managing nonvolatile memory differently depending on tendency of interruption of power supply

• US 10,019,162 B2
• Filed: 06/07/2016
• Issued: 07/10/2018
• Est. Priority Date: 08/31/2015
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Bumhee, Chung, Woonjae
• Primary Examiner(s): Nguyen, Than
• Application Number:
  US15/176,140
• Publication Number:
  US 20170060426A1
• Time in Patent Office: 763 Days
• Field of Search: 711102, 711103, 707813
• CPC Class Codes: G06F 12/0238 Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
• CPC Class Codes: G06F 12/0253 Garbage collection, i.e. reclamation of unreferenced memory
• CPC Class Codes: G06F 12/0261 using reference counting
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0634 by changing the state or mode of one or more devices
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

A storage device includes one or more nonvolatile memories and a memory controller. The memory controller controls operations of the nonvolatile memories. The memory controller controls the nonvolatile memories differently based on a data amount of write data stored in the nonvolatile memories and/or read data output from the nonvolatile memories according to the operations of the nonvolatile memories during each of a plurality of power supply intervals between a point in time where power is supplied and a point in time where the supplied power is interrupted.

Claims

1. A storage device comprising:

one or more nonvolatile memories; and

a memory controller,

wherein the memory controller is configured to cause the one or more nonvolatile memories to operate in one of a first operation mode or a second operation mode based on a data amount of at least one of (a) write data stored in the one or more nonvolatile memories or (b) read data output from the one or more nonvolatile memories, according to the operations of the one or more nonvolatile memories during each of a plurality of power supply intervals between a point in time where power is supplied and a point in time where the supplied power is interrupted.

2. The storage device of claim 1, wherein:

when the data amount is less than or equal to a reference value, the memory controller is configured to cause the one or more nonvolatile memories to operate in the first operation mode, and

when the data amount is greater than the reference value, the memory controller is configured to cause the one or more nonvolatile memories to operate in the second operation mode,

wherein the first operation mode corresponds to a journaling operation mode, and the second operation mode corresponds to a garbage collection operation mode.

3. The storage device of claim 2, wherein:

in the second operation mode, the memory controller is configured to perform a journaling operation to store full data in the one or more nonvolatile memories based on partial data in response to each of a plurality of commands provided from a host, wherein the full data includes at least one of metadata or mapping data, and the partial data includes a changed portion of the at least one of metadata or mapping data, and

in the first operation mode, the memory controller is configured to store the full data in the one or more nonvolatile memories together with a completion mark in response to one command provided from the host.

4. The storage device of claim 2, wherein the memory controller is configured to perform a garbage collection operation at a first speed in the first operation mode, and the memory controller is configured to perform a garbage collection operation at a second speed in the second operation mode, wherein the first speed is faster than the second speed.

5. The storage device of claim 2, wherein:

in the second operation mode, the memory controller is configured to store internal management data in the one or more nonvolatile memories, and

in the first operation mode, the memory controller is configured to not store the internal management data in the one or more nonvolatile memories.

6. The storage device of claim 2, wherein the reference value is dependent on a repetition of occurrences of the power being supplied followed by an interruption of the supplied power, and dependent on a life span of the storage device.

7. The storage device of claim 2, wherein when a booting operation is performed in response to the supplied power, the memory controller is configured to:

calculate the data amount or receive the data amount from a host; and

cause the one or more nonvolatile memories to operate in one of the first operation mode or the second operation mode, based on the calculated data amount or the received data amount,

wherein the first operation mode corresponds to a journaling operation mode, and the second operation mode corresponds to a garbage collection operation mode.

8. The storage device of claim 2, wherein:

in response to a change in the data amount to being greater than the reference value while in the first operation mode, the memory controller is configured to cause the one or more nonvolatile memories to operate in the second operation mode, and

in response to a change in the data amount to being less than or equal to the reference value while in the second operation mode, the memory controller is configured to cause the one or more nonvolatile memories to operate in the first operation mode,

wherein the first operation mode corresponds to a journaling operation mode, and the second operation mode corresponds to a garbage collection operation mode.

9. The storage device of claim 1, wherein the memory controller is further configured to provide a host with a response that indicates one of the first operation mode or the second operation mode of the memory controller, in response to a request from the host.

10. The storage device of claim 1, wherein the memory controller is configured to calculate a weighted average by (a) allocating a first weight to a first data amount corresponding to a most recent power supply interval from among the power supply intervals, (b) allocating a second weight to a second data amount corresponding to one or more power supply intervals other than the most recent power supply interval, and (c) summing the weighted first data amount and the weighted second data amount.

11. A storage device comprising:

a memory controller;

one or more nonvolatile memories configured to;

store or output data under a control of the memory controller, and

store information associated with a data amount of the data that is stored or output during each of a plurality of power supply intervals between a point in time where power is supplied to the one or more nonvolatile memories and a point in time where the supplied power is interrupted; and

a mode register configured to store a status value that indicates one of a first operation mode or a second operation mode of the one or more nonvolatile memories, wherein the first operation mode corresponds to a journaling operation mode, and the second operation mode corresponds to a garbage collection operation mode,

wherein the memory controller is configured to cause the one or more nonvolatile memories to operate in one of the first operation mode or the second operation mode based on the data amount.

12. The storage device of claim 11, wherein the memory controller is further configured to change the operation mode of the one or more nonvolatile memories among the first operation mode or the second operation mode in response to a command provided from a host.

13. The storage device of claim 11, wherein:

at least one operation mode from among the first operation mode and the second operation mode is divided into a plurality of levels, and

the memory controller is configured to perform operations on the one or more nonvolatile memories in one of the first operation mode or the second operation mode according to the plurality of levels, wherein the plurality of levels correspond to varying types of management of data stored in the one or more nonvolatile memories.

14. The storage device of claim 11, wherein the memory controller is configured to select the operation mode of the one or more nonvolatile memories further based on an amount of free blocks included in the one or more nonvolatile memories.

15. A storage device, comprising:

one or more nonvolatile memories; and

a memory controller,

wherein the memory controller is configured to cause the one or more nonvolatile memories to operate in a first operation mode or a second operation mode depending on a data amount of write data stored in the one or more nonvolatile memories during each of a plurality of intervals of time.

16. The storage device of claim 15, wherein the memory controller is configured to cause the one or more nonvolatile memories to operate in the first operation mode or the second operation mode depending on a data amount of read data output from the one or more nonvolatile memories during each of the plurality of intervals of time.

17. The storage device of claim 15, wherein each of the plurality of intervals of time correspond to an interval between a point in time where power is supplied to the one or more nonvolatile memories and a point in time where the supplied power is interrupted.

18. The storage device of claim 15, wherein:

the plurality of intervals of time include (a) a first interval of time between a first point in time where power is supplied to the one or more nonvolatile memories and a second point in time where the supplied power is interrupted, (b) a second interval of time between a third point in time where power is supplied to the one or more nonvolatile memories and a fourth point in time where the supplied power is interrupted, and (c) a third interval of time between a fifth point in time where power is supplied to the one or more nonvolatile memories and a sixth point in time where the supplied power is interrupted, and

the memory controller is configured to cause the one or more nonvolatile memories to operate in the first operation mode or the second operation mode depending on (a) a first data amount of write data stored in the one or more nonvolatile memories during the first interval of time, (b) a second data amount of write data stored in the one or more nonvolatile memories during the second interval of time, and (c) a third data amount of write data stored in the one or more nonvolatile memories during the third interval of time.

19. The storage device of claim 18, wherein:

the memory controller is configured to compare the first data amount to a reference value,

in response to determining that the first data amount is less than or equal to the reference value, the memory controller is configured to cause the one or more nonvolatile memories to operate in the first operation mode,

in response to determining that the first data amount is greater than the reference value, the memory controller is configured to cause the one or more nonvolatile memories to operate in the second operation mode,

the memory controller is configured to compare the second data amount to the reference value,

in response to determining that the second data amount is less than or equal to the reference value, the memory controller is configured to cause the one or more nonvolatile memories to operate in the first operation mode,

in response to determining that the second data amount is greater than the reference value, the memory controller is configured to cause the one or more nonvolatile memories to operate in the second operation mode,

the memory controller is configured to compare the third data amount to the reference value,

in response to determining that the third data amount is less than or equal to the reference value, the memory controller is configured to cause the one or more nonvolatile memories to operate in the first operation mode, and

in response to determining that the third data amount is greater than the reference value, the memory controller is configured to cause the one or more nonvolatile memories to operate in the second operation mode.