Access-based eviction of blocks from solid state drive cache memory

• US 10,019,364 B2
• Filed: 09/02/2016
• Issued: 07/10/2018
• Est. Priority Date: 02/17/2015
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Inventors: Shetty, Pradeep, Karmarkar, Sandeep, Ramamoorthy, Senthil Kumar, Maheshwari, Umesh, Buca, Vanco
• Primary Examiner(s): SONG, HUA JASMINE
• Application Number:
  US15/256,463
• Publication Number:
  US 20160371186A1
• Time in Patent Office: 676 Days
• Field of Search: 711103, 711133, 711135, 707813
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0831 using a bus scheme, e.g. with bus monitoring or watching means
• CPC Class Codes: G06F 12/128 adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
• CPC Class Codes: G06F 2212/621 Coherency control relating to peripheral accessing, e.g. from DMA or I/O device
• CPC Class Codes: G06F 2212/7207 management of metadata or control data
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0617 in relation to availability
• CPC Class Codes: G06F 3/0655 Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
• CPC Class Codes: G06F 3/0665 at area level, e.g. provisioning of virtual or logical volumes
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G11C 7/1072 for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories

Abstract

Methods and systems are presented for allocating CPU cycles among processes in a storage system. One method includes operations for maintaining segments in a first memory, each segment including blocks, and for maintaining a block temperature for each block in a second memory. The first memory is a read-cache where one segment is written at a time, and each block is readable from the first memory without reading the corresponding complete segment. The block temperature is based on the frequency of access to the respective block, and a segment temperature is based on the block temperature of its blocks. Additionally, the segment with the lowest segment temperature is selected for eviction from the second memory, and blocks in the selected segment with a block temperature greater than a threshold temperature are identified. The selected segment is evicted, and a segment with the identified blocks is written to the first memory.

Claims

1. A method comprising:

maintaining, in a first memory, a plurality of segments, each segment including a plurality of blocks, and maintaining, in a second memory, a block temperature for each block of each plurality of blocks, wherein the first memory is a read-cache memory where one segment is written at a time, wherein each block is readable from the first memory without reading a corresponding complete segment, a first block temperature of a first block of the blocks being based on a frequency of access of the first block, and a second block temperature of a second block of the blocks assigned to a predefined temperature value responsive to the second block being pinned to a cache, wherein a segment temperature for each respective segment is based on block temperatures for the corresponding plurality of blocks within the respective segment;

selecting a segment from the plurality of segments with a lowest segment temperature for eviction based on block temperatures from the second memory;

identifying blocks in the selected segment with a block temperature greater than a threshold temperature;

evicting the selected segment from the first memory; and

writing to the first memory a new segment having the identified blocks.

2. The method as recited in claim 1, wherein the first block temperature for the first block increases when the first block is accessed, wherein the block temperature for the first block decreases periodically.

3. The method as recited in claim 1, wherein, for each respective segment, the segment temperature for the respective segement is equal to a total number of bytes in the blocks in the respective segment that have block temperatures greater than or equal to a temperature threshold.

4. The method as recited in claim 1, wherein each block is associated with a volume, wherein each segment is operable to include blocks from one volume and each segment is operable to include blocks from a plurality of volumes.

5. The method as recited in claim 1, wherein the read-cache memory is a memory acting as a cache for read requests and not acting as a cache for write requests.

6. The method as recited in claim 1, wherein the identified blocks are copied forward by being re-cached in the first memory, wherein blocks in the selected segment that were not identified are not copied forward.

7. The method as recited in claim 1, wherein a non-volatile random-access memory (NVRAM) memory is used as a write cache, wherein the plurality of segments are formed in the NVRAM and transferred to hard disk storage.

8. The method as recited in claim 1, wherein the blocks of the selected segment are variable sized blocks.

9. The method as recited in claim 1, wherein the second block temperature of the second block pinned to the cache is assigned to a maximum temperature value.

10. A system comprising:

a first memory for storing a plurality of segments, each segment including a plurality of blocks, wherein the first memory is a read-cache memory where one segment is written at a time, wherein each block is readable from the first memory without reading a corresponding complete segment;

a second memory for storing a block temperature for each block of each plurality of blocks, a first block temperature of a first block of the blocks being based on a frequency of access of the first block, and a second block temperature of a second block of the blocks assigned to a predefined temperature value responsive to the second block being pinned to a cache, wherein a segment temperature for each respective segment is based on block temperatures for the corresponding plurality of blocks within the respective segment; and

a processor to;

select a segment from a plurality of segments with a lowest segment temperature for eviction based on block temperatures from the second memory,

identify blocks in the selected segment with a block temperature greater than a threshold temperature,

evict the selected segment from the first memory, and

write a new segment having the identified blocks to the first memory.

11. The system as recited in claim 10, further comprising:

a hard disk storage for keeping all blocks in a non-volatile memory.

12. The system as recited in claim 11, further comprising:

a non-volatile random-access memory (NVRAM) memory used as a write-cache memory, wherein the segments are formed in the NVRAM and transferred to the hard disk storage.

13. The system as recited in claim 10, wherein blocks are of variable length.

14. The system as recited in claim 10, wherein a third block temperature of a third block that is cold is assigned another specified temperature value.

15. The system as recited in claim 10, wherein the second block temperature of the second block pinned to the cache is assigned to a maximum temperature value.

16. The system as recited in claim 10, wherein, for each respective segment, the segment temperature for the respective segment is based on an amount of data in blocks in the respective segment that have block temperatures greater than or equal to a temperature threshold.

17. The system as recited in claim 10, wherein the second block temperature of the second block pinned to the cache is unchanged over time.

18. A non-transitory computer-readable storage medium storing computer program instructions that upon execution cause a system to:

maintain, in a first memory, a plurality of segments, each segment including a plurality of blocks, and maintain, in a second memory, a block temperature for each block of each plurality of blocks, wherein the first memory is a read-cache memory where one segment is written at a time, wherein each block is readable from the first memory without reading a corresponding complete segment, a first block temperature of a first block of the blocks being based on a frequency of access of the first block, and a second block temperature of a second block of the blocks assigned to a predefined temperature value responsive to the second block being pinned to a cache, wherein a segment temperature for each respective segment is based on block temperatures for the corresponding plurality of blocks within the respective segment;

select a segment from the plurality of segments with a lowest segment temperature for eviction based on block temperatures from the second memory;

identify blocks in the selected segment with a block temperature greater than a threshold temperature;

evict the selected segment from the first memory; and

write to the first memory a new segment having the identified blocks.

19. The non-transitory computer-readable storage medium as recited in claim 18, wherein the second block temperature of the second block pinned to the cache assigned to a maximum temperature value.

20. The non-transitory computer-readable storage medium as recited in claim 18, wherein, for each respective segment, the segment temperature for the respective segment is based on an amount of data in blocks in the respective segment that have block temperatures greater than or equal to a temperature threshold.