Field-effect transistor, semiconductor memory display element, image display device, and system

• US 10,020,374 B2
• Filed: 12/22/2010
• Issued: 07/10/2018
• Est. Priority Date: 12/25/2009
• Status: Active Grant

• Current Assignee: Ricoh Company Limited
• Original Assignee: Ricoh Company Limited
• Inventors: Sone, Yuji, Ueda, Naoyuki, Nakamura, Yuki, Abe, Yukiko
• Primary Examiner(s): Le, Thao X
• Assistant Examiner(s): DYKES, LAURA M
• Application Number:
  US13/515,463
• Publication Number:
  US 20120248451A1
• Time in Patent Office: 2,757 Days
• Field of Search: 257 59
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2001/1635 the pixel comprises active switching elements, e.g. TFT
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: H10B 12/05 Making the transistor
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]

Abstract

A field-effect transistor includes a substrate; a source electrode, a drain electrode, and a gate electrode that are formed on the substrate; a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and a gate insulating layer provided between the gate electrode and the semiconductor layer. The gate insulating layer is formed of an amorphous composite metal oxide insulating film including one or two or more alkaline-earth metal elements and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce.

Claims

1. A field-effect transistor comprising:

a substrate;

a source electrode, a drain electrode, and a gate electrode formed on the substrate;

a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and

a paraelectric gate insulating layer having a portion thereof provided between the gate electrode and the semiconductor layer,

wherein the paraelectric gate insulating layer is formed of a composite metal oxide insulating film having an amorphous structure and including one or two or more elements selected from a group consisting of Be, Mg, Ca, Sr, and Ra and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce, the composite metal oxide insulating film having a resistivity greater than or equal to 1.1E+04 Ω

·

cm,

wherein the composite metal oxide insulating film excludes a perovskite metal oxide and a layer type perovskite metal oxide, and

wherein the paraelectric gate insulating layer is in direct contact with the semiconductor layer.

2. The field-effect transistor according to claim 1, wherein the semiconductor layer is an oxide semiconductor.

3. The field-effect transistor according to claim 1, wherein the substrate is an insulating substrate.

4. The field-effect transistor according to claim 1, wherein the substrate is a semiconductor substrate.

5. A volatile semiconductor memory comprising:

the field-effect transistor according to claim 1;

a first capacitor electrode connected to the drain electrode;

a second capacitor electrode; and

a capacitor dielectric layer provided between the first capacitor electrode and the second capacitor electrode.

6. The volatile semiconductor memory according to claim 5, wherein the capacitor dielectric layer is formed of an amorphous composite metal oxide insulating film including one or two or more alkaline-earth metal elements and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce.

7. A non-volatile semiconductor memory comprising:

the field-effect transistor according to claim 1,

wherein a second gate insulating layer and a floating gate electrode are provided between the semiconductor layer and the gate insulating layer.

8. A display element comprising:

an optical control element whose optical output is controlled in accordance with driving signals; and

a driving circuit that drives the optical control element, the driving circuit including the field-effect transistor according to claim 1.

9. The display element according to claim 8, wherein the optical control element includes an organic electro luminescence element.

10. The display element according to claim 8, wherein the optical control element includes a liquid crystal element.

11. The display element according to claim 8, wherein the optical control element includes an electrochromic element.

12. The display element according to claim 8, wherein the optical control element includes an electrophoretic element.

13. The display element according to claim 8, wherein the optical control element includes an electrowetting element.

14. An image display device for displaying an image in accordance with image data, comprising:

a plurality of the display elements according to claim 8 arranged in a matrix;

a plurality of wirings that separately apply gate voltages to the field-effect transistors included in the plural display elements; and

a display control device that separately controls the gate voltages of the field-effect transistors via the plural wirings, in accordance with the image data.

15. A system comprising:

the image display device according to claim 14; and

an image data creating device that creates the image data based on image information to be displayed, and that outputs the image data to the image display device.

16. The field-effect transistor according to claim 1, wherein a volume resistivity of the composite metal oxide insulating film is ρ

>

5.9E+6 Ω

cm.

17. The field-effect transistor according to claim 1, wherein the resistivity of the paraelectric gate insulating film does not change with respect to voltage applied from the gate electrode.

18. A field-effect transistor comprising:

a substrate;

a source electrode, a drain electrode, and a gate electrode formed on the substrate;

a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and

a paraelectric gate insulating layer having a portion thereof provided between the gate electrode and the semiconductor layer,

wherein the paraelectric gate insulating layer consists of a composite metal oxide insulating film having an amorphous structure and including one or two or more elements selected from a group consisting of Be, Mg, Ca, Sr, and Ra and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce,

wherein the composite metal oxide insulating film excludes a perovskite metal oxide and a layer type perovskite metal oxide, and

wherein the paraelectric gate insulating layer is in direct contact with the semiconductor layer.

19. The field-effect transistor according to claim 18, wherein the resistivity of the paraelectric gate insulating film does not change with respect to voltage applied from the gate electrode.

20. A field-effect transistor comprising:

a substrate;

a source electrode, a drain electrode, and a gate electrode formed on the substrate;

a semiconductor layer by which a channel is formed between the source electrode and the drain electrode when a predetermined voltage is applied to the gate electrode; and

a paraelectric gate insulating layer having a portion thereof provided between the gate electrode and the semiconductor layer,

wherein the paraelectric gate insulating layer is formed of a composite metal oxide insulating film having an amorphous structure and including one or two or more elements selected from a group consisting of Be, Mg, Ca, Sr, and Ra and one or two or more elements selected from a group consisting of Ga, Sc, Y, and lanthanoid except Ce, the composite metal oxide insulating film having a resistivity greater than or equal to 1.1E+04 Ω

·

cm,

wherein the paraelectric gate insulating layer is in direct contact with the semiconductor layer, and

wherein the composite metal oxide insulating film excludes a perovskite metal oxide and a layer type perovskite metal oxide.

21. The field-effect transistor according to claim 20, wherein the resistivity of the paraelectric gate insulating film does not change with respect to voltage applied from the gate electrode.