Display panel and method for forming the same

• US 10,025,416 B2
• Filed: 10/21/2015
• Issued: 07/17/2018
• Est. Priority Date: 04/01/2015
• Status: Active Grant

• Current Assignee: Shanghai AVIC Optoelectronics Company Limited (Tianma Microelectronics Company Limited), Tianma Microelectronics Company Limited
• Original Assignee: Shanghai AVIC Optoelectronics Company Limited (Tianma Microelectronics Company Limited), Tianma Microelectronics Company Limited
• Inventors: Jin, Huijun, Li, Gujun
• Primary Examiner(s): Mengistu, Amare
• Assistant Examiner(s): Nadkarni, Sarvesh J
• Application Number:
  US14/919,313
• Publication Number:
  US 20160291774A1
• Time in Patent Office: 1,000 Days
• Field of Search: None
• CPC Class Codes: G02F 1/13338 Input devices, e.g. touch panels
• CPC Class Codes: G06F 2203/04103 Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04164 Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes

Abstract

A display panel and a method for forming the same are provided. A display panel includes: a first substrate and a second substrate, which are set corresponding to each other; the first substrate includes multiple pixel regions arranged in a matrix form, and a first black matrix is disposed in intervals between the pixel regions; each of the pixel regions includes a first sub pixel region, a second sub pixel region, a third sub pixel region and a fourth sub pixel region; the first sub pixel region includes a first sub pixel unit, the second sub pixel region includes a second sub pixel unit, the third sub pixel region includes a third sub pixel unit; the fourth sub pixel region includes a fourth sub pixel unit and a second black matrix. Accordingly, the display panel may improve display performance.

Claims

1. A display panel, comprising:

a first substrate and a second substrate facing each other;

wherein the first substrate comprises a plurality of pixel regions arranged in a matrix form, and wherein a first black matrix disposed in intervals between the plurality of pixel regions;

wherein the plurality of pixel regions each comprises a first sub pixel region, a second sub pixel region, a third sub pixel region and a fourth sub pixel region;

wherein the first sub pixel region comprises a first sub pixel unit, the second sub pixel region comprises a second sub pixel unit, the third sub pixel region comprises a third sub pixel unit;

wherein the fourth sub pixel region comprises a fourth sub pixel unit and a second black matrix;

wherein an area of the fourth sub pixel unit is smaller than an area of each of the first sub pixel unit, the second sub pixel unit and the third sub pixel unit;

wherein the second substrate comprises a plurality of common electrodes arranged in a matrix form, wherein a first interval region is disposed between two neighboring common electrodes in a same row, and wherein the first interval region overlaps the first black matrix and the second black matrix in a direction perpendicular to a plane where the second substrate is arranged; and

wherein each of the plurality of common electrodes is electrically connected to a first signal wire, and at least one of the first signal wires overlaps the first black matrix and the second black matrix in the direction perpendicular to the plane where the second substrate is arranged.

2. The display panel according to claim 1, wherein, along a row direction of the display panel, the second black matrix is disposed between the fourth sub pixel unit and the first black matrix in each of the plurality of pixel regions.

3. The display panel according to claim 1, wherein each of the first signal wires overlaps the first black matrix and the second black matrix in the direction perpendicular to the plane where the second substrate is arranged in.

4. A display panel, comprising:

a first substrate and a second substrate facing each other;

wherein the first substrate comprises a plurality of pixel regions arranged in a matrix form, and wherein a first black matrix disposed in intervals between the plurality of pixel regions;

wherein the plurality of pixel regions each comprises a first sub pixel region, a second sub pixel region, a third sub pixel region and a fourth sub pixel region;

wherein the first sub pixel region comprises a first sub pixel unit, the second sub pixel region comprises a second sub pixel unit, the third sub pixel region comprises a third sub pixel unit;

wherein the fourth sub pixel region comprises a fourth sub pixel unit and a second black matrix;

wherein an area of the fourth sub pixel unit is smaller than an area of each of the first sub pixel unit, the second sub pixel unit and the third sub pixel unit;

wherein the second substrate comprises a plurality of second thin-film transistors arranged in a matrix form, and wherein a plurality of gate lines each connected to a gate of one of the plurality of second thin-film transistors; and

wherein, along a column direction of the display panel, the second black matrix is disposed between the fourth sub pixel unit and the first black matrix in each of the plurality of pixel regions, and wherein the column direction is perpendicular to a direction in which the plurality of gate lines extend.

5. The display panel according to claim 4, wherein the second substrate comprises:

a plurality of common electrodes arranged in a matrix form;

a plurality of thin-film transistors arranged in a matrix form, where each of the thin-film transistors comprises a gate, a source and a drain;

control signal wires; and

touch-control display signal wires;

wherein each of the common electrodes is electrically connected to the drain of one of the thin-film transistors;

wherein the gates of the thin-film transistors in a row are electrically connected to the control signal wires in a same row;

wherein the sources of the thin-film transistors in a column are electrically connected to the touch-control display signal wires in a same column; and

wherein the control signal wires and the touch-control display signal wires overlap the first black matrix in a direction perpendicular to a plane of the second substrate, and wherein the thin-film transistors overlap the second black matrix in the direction perpendicular to the plane of the second substrate.

6. A method for forming the display panel according to claim 4, comprising:

forming the first substrate and the second substrate facing to each other;

arranging the plurality of pixel regions in matrix form on the first substrate;

forming the first black matrix in an interval between two of the pixel regions;

forming the first sub pixel unit in the first sub pixel region;

forming the second sub pixel unit in the second sub pixel region;

forming the third sub pixel unit in the third sub pixel region;

forming the fourth sub pixel unit and the second black matrix in the fourth sub pixel region;

forming a plurality of second thin-film transistors arranged in a matrix form on the second substrate, and

forming a plurality of gate lines each connected to a gate of one of the plurality of second thin-film transistors on the second substrate;

wherein the plurality of pixel regions each comprises the first sub pixel region, the second sub pixel region, the third sub pixel region and the fourth sub pixel region;

wherein, along a column direction of the display panel, the second black matrix is formed between the fourth sub pixel unit and the first black matrix in each of the plurality of pixel regions, and wherein the column direction is perpendicular to a direction of the plurality of gate lines.

7. The method according to claim 6, further comprising:

forming a plurality of common electrodes in a matrix form on the second substrate;

forming a plurality of thin-film transistors in a matrix form, wherein the plurality of thin-film transistors each comprises;

a gate, a source and a drain; and

forming control signal wires and touch-control display signal wires on the thin-film transistors;

wherein each of the common electrodes is set electrically connected to the drain of one of the thin-film transistors;

wherein gates of the thin-film transistors in a row are set electrically connected to the control signal wires in a same row;

wherein sources of the thin-film transistors in a column are set electrically connected to the touch-control display signal wires in a same column; and

wherein the control signal wires and the touch-control display signal wires overlap the first black matrix in a direction perpendicular to a plane of the second substrate, and wherein the thin-film transistors overlap the second black matrix in the direction perpendicular to the plane of the second substrate.

8. A method for forming a display panel, comprising:

forming a first substrate and a second substrate facing each other;

forming a plurality of pixel regions in a form of matrix on the first substrate;

forming a first black matrix in at least one of intervals between the plurality of pixel regions;

wherein the plurality of pixel regions each comprises a first sub pixel region, a second sub pixel region, a third sub pixel region and a fourth sub pixel region;

forming a first sub pixel unit in the first sub pixel region, forming a second sub pixel unit in the second sub pixel region, and forming a third sub pixel unit in the third sub pixel region;

forming a fourth sub pixel unit and a second black matrix in the fourth sub pixel region;

forming a plurality of common electrodes arranged in a matrix form on the second substrate;

forming a first interval region between two neighboring common electrodes in a same row, wherein the first interval region overlaps the first black matrix and the second black matrix in a direction perpendicular to a plane of the second substrate;

connecting the plurality of common electrodes each to a first signal wire, wherein at least one of the first signal wires overlaps the first black matrix and the second black matrix in the direction perpendicular to the plane of the second substrate;

wherein an area of the fourth sub pixel unit is smaller than an area of each of the first sub pixel unit, the second sub pixel unit and the third sub pixel unit.

9. The method according to claim 8, wherein, along a row direction of the display panel, the second black matrix is formed between the fourth sub pixel unit and the first black matrix in each pixel region of the plurality of pixel regions.

10. The method according to claim 8, wherein each of the first signal wires overlaps the first black matrix and the second black matrix in the direction perpendicular to the plane of the second substrate.