Power-safe data management system

• US 10,025,712 B2
• Filed: 06/06/2016
• Issued: 07/17/2018
• Est. Priority Date: 03/28/2011
• Status: Active Grant

• Current Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Chiu, Lyndon S., Adi, Frederick H.
• Primary Examiner(s): Thai, Tuan
• Assistant Examiner(s): Matin, Tasnima
• Application Number:
  US15/174,955
• Publication Number:
  US 20160357670A1
• Time in Patent Office: 771 Days
• Field of Search: 711103, 711115
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

Embodiments of the invention include systems and methods for recovering the system status and maintaining drive coherency after an unexpected power loss. In particular, these systems and methods reduce overhead for maintaining drive coherency by providing for pre-allocation of groups of write addresses and recording the pre-allocated groups of addresses to the non-volatile memory. Write processes can write to the pre-allocated group of addresses while the next group of addresses are pre-allocated and recorded to non-volatile memory.

Claims

1. A method comprising:

writing data for a first write process to a first superblock of addresses in non-volatile memory, the first superblock designated as a current superblock in a master record stored in volatile memory;

upon writing data to a last address of the first superblock, designating a second superblock of addresses in the non-volatile memory as the current superblock in the master record stored in the volatile memory, wherein the second superblock was designated as a next superblock in the master record prior to be designated as the current superblock;

initiating a flush of the master record from the volatile memory to the non-volatile memory after the second superblock has been designated as the current superblock in the master record, the flush comprising writing the master record to the non-volatile memory; and

writing data for the first write process to the second superblock of addresses prior to completing the write of the master record to the non-volatile memory.

2. The method of claim 1, wherein initiating the flush of the master record comprises adding the master record to a write queue for writing to the non-volatile memory.

3. The method of claim 2, wherein a depth of the write queue is less than a capacity of the second superblock.

4. The method of claim 1, further comprising:

writing data for a second write process to a third superblock of addresses in the non-volatile memory, the third superblock designated as a current superblock for the second write process in the master record;

upon writing data to a last address of the third superblock, designating a fourth superblock of addresses in the non-volatile memory as the current superblock for the second write process in the master record stored in the volatile memory, wherein the fourth superblock was designated as a next superblock for the second write process in the master record prior to be designated as the current superblock;

initiating a flush of the master record from the volatile memory to the non-volatile memory after the fourth superblock has been designated as the current superblock for the second write process in the master record, the flush comprising writing the master record to the non-volatile memory; and

writing data for the second write process to the fourth superblock of addresses after completing the write of the master record to the non-volatile memory.

5. The method of claim 4, wherein the first write process was initiated by a user data manager and the second write process was not initiated by the user data manager.

6. The method of claim 1, further comprising:

designating the first superblock of addresses as a previous superblock in the master record; and

designating a third superblock of addresses in the non-volatile memory as the next superblock in the master record.

7. The method of claim 1, wherein the non-volatile memory comprises a plurality of die, and wherein the first and second superblock of addresses each comprise as least one address associated with each of the plurality of die.

8. A storage system, comprising:

non-volatile memory;

volatile memory; and

a controller configured to;

write data for a first write process to a first superblock of addresses in the non-volatile memory, the first superblock designated as a current superblock in a master record stored in the volatile memory;

upon writing data to a last address of the first superblock, designate a second superblock of addresses in the non-volatile memory as the current superblock in the master record stored in the volatile memory, wherein the second superblock was designated as a next superblock in the master record prior to be designated as the current superblock;

initiate a flush of the master record from the volatile memory to the non-volatile memory after the second superblock has been designated as the current superblock in the master record, the flush comprising writing the master record to the non-volatile memory; and

write data for the first write process to the second superblock of addresses prior to completing the write of the master record to the non-volatile memory.

9. The storage system of claim 8, wherein the controller is configured to initiate the flush of the master record by adding the master record to a write queue for writing to the non-volatile memory.

10. The storage system of claim 9, wherein a depth of the write queue is less than a capacity of the second superblock.

11. The storage system of claim 8, wherein the controller is further configured to:

write data for a second write process to a third superblock of addresses in the non-volatile memory, the third superblock designated as a current superblock for the second write process in the master record;

upon writing data to a last address of the third superblock, designate a fourth superblock of addresses in the non-volatile memory as the current superblock for the second write process in the master record stored in the volatile memory, wherein the fourth superblock was designated as a next superblock for the second write process in the master record prior to be designated as the current superblock;

initiate a flush of the master record from the volatile memory to the non-volatile memory after the fourth superblock has been designated as the current superblock for the second write process in the master record, the flush comprising writing the master record to the non-volatile memory; and

write data for the second write process to the fourth superblock of addresses after completing the write of the master record to the non-volatile memory.

12. The storage system of claim 11, wherein the first write process was initiated by a user data manager and the second write process was not initiated by the user data manager.

13. The storage system of claim 8, wherein the controller is further configured to:

designate the first superblock of addresses as a previous superblock in the master record; and

designate a third superblock of addresses in the non-volatile memory as the next superblock in the master record.

14. The storage system of claim 8, wherein the non-volatile memory comprises a plurality of die, and wherein the first and second superblock of addresses each comprise as least one address associated with each of the plurality of die.