Liquid crystal display device

• US 10,031,372 B2
• Filed: 05/12/2015
• Issued: 07/24/2018
• Est. Priority Date: 02/26/2008
• Status: Active Grant

• Current Assignee: Panasonic Intellectual Property Corporation of America (Panasonic Holdings Corporation)
• Original Assignee: Japan Display Incorporated, Panasonic Liquid Crystal Display Company Limited (Panasonic Holdings Corporation)
• Inventors: Ochiai, Takahiro, Sasaki, Tohru, Nagata, Tetsuya
• Primary Examiner(s): LAU, EDMOND C
• Application Number:
  US14/709,529
• Publication Number:
  US 20150241723A1
• Time in Patent Office: 1,169 Days
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/13415 Drop filling process
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
• CPC Class Codes: G02F 1/13606 having means for reducing parasitic capacitance
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136277 formed on a semiconductor substrate, e.g. of silicon
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence

Abstract

A column for defining the interval between a TFT substrate and an opposed substrate is formed at a crossing point between a drain line and a scanning line. At the crossing point where the column is formed, the drain line is formed to have a wider width to prevent light leakage. Further, at the crossing point where the column is formed, the scanning line is formed to have a narrower width to prevent increase of capacitance between the drain line and the scanning line. The column is formed at a crossing point corresponding to a specific color, e.g., a blue pixel B, so that a difference in transmittance and in characteristic of thin film transistors due to formation of the column is initially compensated.

Claims

1. A liquid crystal display device comprising:

a first substrate;

a second substrate;

liquid crystal enclosed between the first substrate and the second substrate;

a scanning line formed between the first substrate and the liquid crystal;

a drain line crossing the scanning line;

a thin film transistor having a semiconductor layer and a source electrode, the semiconductor layer being connected to the drain line via a first contact hole and connected to the source electrode via a second contact hole;

a first pixel electrode connected to the source electrode via a third contact hole;

a second pixel electrode located on a side opposite to the first pixel electrode across the scanning line in a plan view; and

a spacer disposed between the first substrate and the second substrate,

wherein the first pixel electrode is located on a first side of the scanning line in the plan view, and the second pixel electrode is located on a second side of the scanning line in the plan view,

wherein the semiconductor layer overlapped with the scanning line at a first channel region and a second channel region, and a part of the semiconductor layer between the first channel region and the second channel region is arranged on the second side of the scanning line, and

wherein the spacer is overlapped with the first channel region, the scanning line, and the drain line, and

wherein the first contact hole, the second contact hole, and the third contact hole are arranged on the first side of the scanning line, and are separated from the spacer in the plan view, and

wherein the part of the semiconductor layer between the first channel region and the second channel region is overlapped with the second pixel electrode.

2. A liquid crystal display device according to claim 1,

wherein the spacer is overlapped with the first channel region, the scanning line and drain line in the plan view.

3. A liquid crystal display device according to claim 2,

wherein the scanning line is disposed between the semiconductor layer and the spacer in a cross-section view.

4. A liquid crystal display device according to claim 2, wherein the spacer is formed on the first substrate.

5. A liquid crystal display device according to claim 2,

wherein a width of the drain line at a crossing point between the drain line and the scanning line is wider than at other portions of the drain line.

6. A liquid crystal display device according to claim 5,

wherein a width of the scanning line at the crossing point is narrower than at other portions of the scanning line.

7. A liquid crystal display device according to claim 2,

wherein a width of the scanning line at a crossing point between the drain line and the scanning line is wider than at other portions of the scanning line.

8. A liquid crystal display device according to claim 7,

wherein a width of the drain line at the crossing point is narrower than at other portions of the drain line.

9. A liquid crystal display device according to claim 1,

wherein the first pixel electrode is overlapped with the scanning line.

10. A liquid crystal display device according to claim 1,

wherein the second pixel electrode is overlapped with the scanning line.

11. A liquid crystal display device according to claim 1,

wherein the spacer is provided on the second substrate and located away from the third contact hole.