Semiconductor processing with DC assisted RF power for improved control

• US 10,032,606 B2
• Filed: 06/20/2016
• Issued: 07/24/2018
• Est. Priority Date: 08/02/2012
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Yang, Jang-Gyoo, Chen, Xinglong, Park, Soonam, Baek, Jonghoon, Garg, Saurabh, Venkataraman, Shankar
• Primary Examiner(s): Zervigon, Rudy
• Application Number:
  US15/187,211
• Publication Number:
  US 20160300694A1
• Time in Patent Office: 764 Days
• Field of Search: 118715, 118722, 118723 R, 118723 E, 15634533, 15634534, 15634543-34547
• CPC Class Codes: C23C 16/50 using electric discharges generation and control of plasma in discharge tubes for surface treatment H01J37/32, H01J37/34
• CPC Class Codes: C23C 16/503 using dc or ac discharges
• CPC Class Codes: C23C 16/505 using radio frequency discharges
• CPC Class Codes: C23C 16/509 using internal electrodes
• CPC Class Codes: C23C 16/5093 Coaxial electrodes
• CPC Class Codes: H01J 2237/332 Coating
• CPC Class Codes: H01J 2237/334 Etching
• CPC Class Codes: H01J 37/32091 the radio frequency energy being capacitively coupled to the plasma
• CPC Class Codes: H01J 37/32146 Amplitude modulation, includes pulsing
• CPC Class Codes: H01J 37/32422 Arrangement for selecting ions or species in the plasma
• CPC Class Codes: H01J 37/3244 Gas supply means
• CPC Class Codes: H01J 37/32568 Relative arrangement or disposition of electrodes; moving means
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/31138 by dry-etching
• CPC Class Codes: H01L 21/32136 using plasmas
• CPC Class Codes: H01L 21/67069 for drying etching
• CPC Class Codes: H01L 21/67075 : for wet etching

Abstract

Semiconductor processing systems are described including a process chamber. The process chamber may include a lid assembly, grid electrode, conductive insert, and ground electrode. Each component may be coupled with one or more power supplies operable to produce a plasma within the process chamber. Each component may be electrically isolated through the positioning of a plurality of insulation members. The one or more power supplies may be electrically coupled with the process chamber with the use of switching mechanisms. The switches may be switchable to electrically couple the one or more power supplies to the components of the process chamber.

Claims

1. A semiconductor processing system comprising:

a processing chamber that includes;

a lid assembly defining a precursor inlet through which precursor species may be delivered;

a ground electrode;

a grid electrode disposed between the lid assembly and the ground electrode, and defining a first plasma region within the chamber between the grid electrode and the lid assembly and a second plasma region within the chamber between the grid electrode and the ground electrode;

a conductive insert disposed between the lid assembly and the grid electrode at a periphery of the first plasma region and at least partially defining a section of a sidewall of the processing chamber;

an insulation member positioned to electrically isolate the grid electrode from the conductive insert;

a first power supply electrically coupled with the lid assembly; and

a second power supply electrically coupled with at least one of the lid assembly, the grid electrode, or the conductive insert.

2. The semiconductor processing system of claim 1, further comprising a first switch that is electrically coupled with the second power supply, and that is switchable to electrically couple the second power supply to one of the lid assembly, the grid electrode, or the conductive insert.

3. The semiconductor processing system of claim 1, further comprising a second switch that is switchable to electrically couple at least two of the lid assembly, the ground electrode, or the grid electrode.

4. The semiconductor processing system of claim 3, wherein the first switch is switched to electrically couple the second power supply with the conductive insert, and wherein the second switch is switched to electrically couple the grid electrode and the ground electrode.

5. The semiconductor processing system of claim 4, wherein the second power supply is configured to deliver a negative voltage to the conductive insert, and wherein the first power supply is configured to ignite a plasma in the first plasma region where electron flux is directed to the grid electrode.

6. The semiconductor processing system of claim 4, wherein the second power supply is configured to deliver a positive voltage to the conductive insert, and wherein the first power supply is configured to ignite a plasma in the first plasma region where ion flux is directed to the grid electrode.

7. The semiconductor processing system of claim 3, wherein the first switch is switched to electrically couple the second power supply with the lid assembly such that both the first and second power supplies are electrically coupled with the lid assembly, and wherein the second switch is switched to electrically couple the grid electrode and the ground electrode.

8. The semiconductor processing system of claim 7, wherein the second power supply is configured to provide constant voltage to the lid assembly, and the first power supply is configured to provide pulsed frequency power to the lid assembly.

9. The semiconductor processing system of claim 3, wherein the first switch is switched to electrically couple the second power supply with the lid assembly such that both the first and second power supplies are electrically coupled with the lid assembly, and wherein the second switch is switched to electrically couple the grid electrode and the lid assembly.

10. The semiconductor processing system of claim 9, wherein the second power supply is configured to provide constant voltage to the lid assembly, and the first power supply is configured to provide pulsed frequency power to the lid assembly.

11. The semiconductor processing system of claim 3, wherein the first switch is switched to electrically couple the second power supply with the grid electrode.

12. The semiconductor processing system of claim 11, wherein the second power supply is configured to provide constant voltage to the grid electrode, and the first power supply is configured to provide pulsed frequency power to the lid assembly.

13. The semiconductor processing system of claim 1, wherein the first power supply is an RF power supply, and the second power supply is a DC power supply.