Semiconductor device, method for manufacturing semiconductor device, and electronic appliance having semiconductor device

• US 10,032,888 B2
• Filed: 08/18/2015
• Issued: 07/24/2018
• Est. Priority Date: 08/22/2014
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Tanaka, Tetsuhiro, Tokumaru, Ryo, Yamane, Yasumasa, Shimomura, Akihisa, Okuno, Naoki
• Primary Examiner(s): Payen, Marvin
• Application Number:
  US14/829,029
• Publication Number:
  US 20160056043A1
• Time in Patent Office: 1,071 Days
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

To provide a semiconductor device including an oxide semiconductor layer with high and stable electrical characteristics, the semiconductor device is manufactured by forming a first insulating layer, forming oxide over the first insulating layer and then removing the oxide n times (n is a natural number), forming an oxide semiconductor layer over the first insulating layer, forming a second insulating layer over the oxide semiconductor layer, and forming a conductive layer over the second insulating layer. Alternatively, the semiconductor device is manufactured by forming the oxide semiconductor layer over the first insulating layer, forming the second insulating layer over the oxide semiconductor layer, forming the oxide over the second insulating layer and then removing the oxide n times (n is a natural number), and forming the conductive layer over the second insulating layer.

Claims

1. A method for manufacturing a semiconductor device comprising:

forming a first insulating layer;

forming an oxide insulating film over the first insulating layer;

removing the oxide insulating film;

forming an oxide semiconductor layer over and in direct contact with the first insulating layer after removing the oxide insulating film;

forming a second insulating layer over the oxide semiconductor layer; and

forming a conductive layer over the second insulating layer.

2. The method for manufacturing a semiconductor device according to claim 1, wherein removal of the oxide insulating film is performed by planarization treatment on the first insulating layer.

3. The method for manufacturing a semiconductor device according to claim 1, wherein a step of forming the oxide insulating film over the first insulating layer and then removing the oxide insulating film is performed n times (n is a natural number of 2 or more).

4. The method for manufacturing a semiconductor device according to claim 3, wherein n-th removal of the oxide insulating film is performed by planarization treatment on the first insulating layer.

5. The method for manufacturing a semiconductor device according to claim 4, wherein the planarization treatment is performed with chemical mechanical polishing (CMP).

6. The method for manufacturing a semiconductor device according to claim 1, wherein an upper part of the first insulating layer is removed by 5 nm or more and less than 100 nm.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide insulating film is formed to a thickness of 4 nm or more.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide insulating film includes aluminum oxide.

9. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide insulating film is formed by a sputtering method.

10. A method for manufacturing a semiconductor device comprising:

forming a first insulating layer;

forming a first oxide insulating film over the first insulating layer;

removing the first oxide insulating film;

forming a second oxide insulating film over the first insulating layer after removing the first oxide insulating film;

removing the second oxide insulating film;

forming an oxide semiconductor layer over the first insulating layer after removing the second oxide insulating film;

forming a second insulating layer over the oxide semiconductor layer; and

forming a conductive layer over the second insulating layer.

11. The method for manufacturing a semiconductor device according to claim 10, wherein removal of the second oxide insulating film is performed by planarization treatment on the first insulating layer.

12. The method for manufacturing a semiconductor device according to claim 11, wherein the planarization treatment is performed with chemical mechanical polishing (CMP).

13. The method for manufacturing a semiconductor device according to claim 10, wherein the first oxide insulating film includes aluminum oxide.

14. The method for manufacturing a semiconductor device according to claim 10, wherein the first oxide insulating film is formed by a sputtering method.