Systems and methods for clock synchronization in a data acquisition system

• US 10,033,390 B2
• Filed: 06/23/2015
• Issued: 07/24/2018
• Est. Priority Date: 06/24/2014
• Status: Active Grant

• Current Assignee: Cirrus Logic Incorporated
• Original Assignee: Cirrus Logic Incorporated
• Inventors: Melanson, John L., Holley, Roderick D., Mehta, Jaimin
• Primary Examiner(s): Tan, Richard
• Application Number:
  US14/747,068
• Publication Number:
  US 20150372681A1
• Time in Patent Office: 1,127 Days
• Field of Search: 327513, 331 1 R, 331 25, 331 66, 331116 R, 331154, 331158, 331176
• CPC Class Codes: H03B 5/32 being a piezoelectric resonator selection of piezoelectric material H10N30/00
• CPC Class Codes: H03L 1/026 by using a memory for digitally storing correction values H03L1/025 takes precedence
• CPC Class Codes: H03L 1/028 of generators comprising piezoelectric resonators H03L1/021, H03L1/022 take precedence; oscillation generators with a piezoelectric resonator H03B5/32
• CPC Class Codes: H03L 7/0991 the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider H03L7/0995 takes precedence; fixed oscillators with means for selecting among various phases H03L7/0814

Abstract

A system may include a sampling circuit, a temperature calibration system, a phase detector, a virtual phase-locked loop, and a sample rate converter. The sampling circuit may be configured to generate a series of digitally-sampled data at a sampling frequency provided by a local clock. The temperature calibration system may be configured to determine a temperature-based timing compensation with respect to the local clock. The phase detector may be configured to estimate an error of the local clock in view of the reference clock. The virtual phase-locked loop may be configured to generate a virtual clock based on the temperature-based timing compensation and the error. The sample rate converter may be configured to generate a corrected series of digitally-sampled data in response to the virtual clock by interpolating the series of digitally-sampled data to correct for the error.

Claims

1. A system comprising:

a sampling circuit for generating a series of digitally-sampled data at a sampling frequency provided by a local clock;

a temperature calibration system for determining a temperature-based timing compensation with respect to the local clock;

a phase detector for estimating error of the local clock in view of a reference clock;

a virtual phase-locked loop for generating a virtual clock based on the temperature-based timing compensation and the error; and

a sample rate converter for generating a corrected series of digitally-sampled data in response to the virtual clock by interpolating the series of digitally-sampled data to correct for the error and temperature-based frequency deviation in the local clock.

2. The system of claim 1, wherein the local clock is generated by a crystal oscillator.

3. The system of claim 2, wherein the temperature calibration system comprises a temperature sensor for sensing a temperature proximate to the crystal oscillator.

4. The system of claim 3, wherein the crystal oscillator comprises a dual-harmonic mode crystal oscillator and the temperature sensor comprises the crystal oscillator and is configured to sense a temperature based on an overtone resonance frequency-temperature characteristic of the crystal oscillator.

5. The system of claim 1, wherein the sampling circuit is an analog-to-digital converter.

6. The system of claim 1, wherein the error comprises a timing error.

7. The system of claim 6, wherein the timing error comprises at least one of a frequency error and a phase error.

8. The system of claim 1, wherein the reference clock is generated based on a periodic timing signal provided by a satellite-based positioning system.

9. The system of claim 1, wherein the temperature calibration system comprises a lookup table correlating temperature information to temperature-based timing compensation.

10. The system of claim 1, wherein the temperature calibration system is configured to apply a polynomial function to the temperature information to generate the temperature-based timing compensation.

11. The system of claim 1, wherein the temperature calibration system determines the temperature-based timing compensation based on a rate of change of a measured temperature.

12. The system of claim 1, wherein the temperature calibration system determines the temperature-based timing compensation based on a hysteresis of a measured temperature.

13. The system of claim 12, wherein the temperature-based timing compensation is based on:

whether the measured temperature is increasing or decreasing; and

an extreme temperature of the measured temperature.

14. The system of claim 1, wherein the temperature calibration system predicts a timing error based on temperature information and generates the temperature-based timing compensation based on such prediction.

15. A method comprising:

generating a series of digitally-sampled data at a sampling frequency provided by a local clock;

determining a temperature-based timing compensation with respect to the local clock;

estimating an error of the local clock in view of a reference clock;

generating a virtual clock based on the temperature-based timing compensation and the error; and

generating a corrected series of digitally-sampled data in response to the virtual clock by interpolating the series of digitally-sampled data to correct for the error and temperature-based frequency deviation in the local clock.

16. The method of claim 15, wherein the local clock is generated by a crystal oscillator.

17. The method of claim 16, wherein the temperature-based timing compensation is based on a temperature sensed proximate to the crystal oscillator.

18. The method of claim 17, wherein the crystal oscillator comprises a dual-harmonic mode crystal oscillator and the temperature is sensed based on an overtone resonance frequency-temperature characteristic of the crystal oscillator.

19. The method of claim 15, wherein generating a series of digitally-sampled data comprises converting an analog signal to the series of digitally-sampled data.

20. The method of claim 15, wherein the error comprises a timing error.

21. The method of claim 20, wherein the timing error comprises at least one of a frequency error and a phase error.

22. The method of claim 15, wherein the reference clock is generated based on a periodic timing signal provided by a satellite-based positioning system.

23. The method of claim 15, wherein determining the temperature-based timing compensation comprises correlating temperature information to temperature-based timing compensation with a lookup table.

24. The method of claim 15, wherein determining the temperature-based timing compensation comprises applying a polynomial function to the temperature information to generate the temperature-based timing compensation.

25. The method of claim 15, wherein determining the temperature-based timing compensation comprises determining the temperature-based timing compensation based on a rate of change of a measured temperature.

26. The method of claim 15, wherein determining the temperature-based timing compensation comprises determining the temperature-based timing compensation based on a hysteresis of a measured temperature.

27. The method of claim 26, wherein the temperature-based timing compensation is based on:

whether the measured temperature is increasing or decreasing; and

an extreme temperature of the measured temperature.

28. The method of claim 15, wherein determining the temperature-based timing compensation comprises predicting a timing error based on temperature information and generating the temperature-based timing compensation based on such prediction.