Mesh architectures for managed switching elements

• US 10,038,597 B2
• Filed: 03/21/2016
• Issued: 07/31/2018
• Est. Priority Date: 07/06/2010
• Status: Active Grant

• Current Assignee: Nicira Incorporated (Broadcom, Inc.)
• Original Assignee: Nicira Incorporated (Broadcom, Inc.)
• Inventors: Casado, Martin, Amidon, Keith E., Koponen, Teemu, Lambeth, W. Andrew
• Primary Examiner(s): HSU, ALPUS
• Application Number:
  US15/076,634
• Publication Number:
  US 20160315882A1
• Time in Patent Office: 862 Days
• CPC Class Codes: G06F 11/07 Responding to the occurrence of a fault, e.g. fault tolerance
• CPC Class Codes: G06F 15/17312 Routing techniques specific to parallel machines, e.g. wormhole, store and forward, shortest path problem congestion routing on a LAN H04L45/00
• CPC Class Codes: H04L 12/4633 Interconnection of networks using encapsulation techniques, e.g. tunneling
• CPC Class Codes: H04L 2101/622 Layer-2 addresses, e.g. medium access control [MAC] addresses
• CPC Class Codes: H04L 41/0816 the condition being an adaptation, e.g. in response to network events
• CPC Class Codes: H04L 41/0853 by actively collecting configuration information or by backing up configuration information
• CPC Class Codes: H04L 41/0893 Assignment of logical groups to network elements
• CPC Class Codes: H04L 41/0894 Policy-based network configuration management
• CPC Class Codes: H04L 41/0895 Configuration of virtualised networks or elements, e.g. virtualised network function or OpenFlow elements
• CPC Class Codes: H04L 41/0896 Bandwidth or capacity management, i.e. automatically increasing or decreasing capacities flow or congestion control using dynamic resource allocation, e.g. in-call renegotiation, H04L47/76
• CPC Class Codes: H04L 41/122 of virtualised topologies, e.g. software-defined networks [SDN] or network function virtualisation [NFV]
• CPC Class Codes: H04L 45/00 Routing or path finding of packets in data switching networks routing or path finding in wireless networks H04W40/00
• CPC Class Codes: H04L 45/02 Topology update or discovery
• CPC Class Codes: H04L 45/036 Updating the topology between route computation elements, e.g. between OpenFlow controllers
• CPC Class Codes: H04L 45/586 of virtual routers
• CPC Class Codes: H04L 45/76 Routing in software-defined topologies, e.g. routing between virtual machines
• CPC Class Codes: H04L 47/783 Distributed allocation of resources, e.g. bandwidth brokers
• CPC Class Codes: H04L 49/00 Packet switching elements
• CPC Class Codes: H04L 49/1546 using pipelined operation
• CPC Class Codes: H04L 49/3063 Pipelined operation
• CPC Class Codes: H04L 49/70 : Virtual switches
• CPC Class Codes: H04L 61/5007 : Internet protocol [IP] addresses

Abstract

Some embodiments provide a system that includes a set of network controllers for receiving definitions of first and second logical switching elements. The system includes several managed switching elements. The set of network controllers configure the several managed switching elements to implement the defined first and second logical switching elements. The system includes several network hosts that are each (1) communicatively coupled to one of the several managed switching elements and (2) associated with one of the first and second logical switching elements. Network data communicated between network hosts associated with the first logical switching element are isolated from network data communicated between network hosts associated with the second logical switching element.

Claims

1. A network architecture comprising:

a plurality of lower level managed switching elements (MSEs) for forwarding network data to a plurality of machines comprising a first group of machines that are associated with a first logical datapath set (LDPS) and a second group of machines that are associated with a second LDPS, wherein the first and second LDPSs define first and second logical switching elements (LSEs);

a plurality of higher level MSEs for processing network data received from the plurality of lower level MSEs,

wherein, to distribute processing of the network data from the plurality of lower level MSEs amongst the plurality of higher level MSEs, the plurality of lower level MSEs and the plurality of higher level MSEs are configured in a tunnel mesh configuration with each lower level MSE connected via at least one tunnel to at least one other lower level MSE and with at least two lower level MSEs connected via additional tunnels to at least two higher level MSEs, wherein the higher level and lower level MSEs are configured to implement the first and second logical datapath sets by a set of network controllers.

2. The network architecture of claim 1, wherein at least one lower level MSE in the plurality of lower level MSEs is for forwarding network data of a first machine in the first group of machines and of a second machine in the second group of machines towards a destination machine.

3. The network architecture of claim 1, wherein the tunnel mesh configuration is a partial tunnel mesh configuration, wherein no tunnel is established between at least one lower level MSE of the plurality of lower level MSEs and at least one higher level MSE of the plurality of higher level MSEs.

4. The network architecture of claim 1, wherein no tunnel is established between at least a first lower level MSE and a second lower level MSE.

5. The network architecture of claim 4, wherein a tunnel is established between a particular higher level MSE and each of the first lower level MSE and the second lower level MSE.

6. The network architecture of claim 1, wherein at least one tunnel is established between each lower level MSE of the plurality of lower level MSEs and each higher level MSE of the plurality of higher level MSEs.

7. The network architecture of claim 6, wherein at least one tunnel is established between each lower level MSE of the plurality of lower level MSEs and every other lower level MSE of the plurality of lower level MSEs.

8. The network architecture of claim 1, wherein each machine of the plurality of machines is a virtual machine or a physical machine.

9. The network architecture of claim 1, wherein the plurality of lower level MSEs and the plurality of higher level MSEs are software switching elements.

10. The network architecture of claim 1, wherein each tunnel is established with a tunneling protocol.

11. The network architecture of claim 1, wherein the plurality of higher level MSEs are for processing multi-recipient network data.

12. A method for configuring a plurality of lower level managed switching elements (MSEs) and a plurality of higher level MSEs in a tunnel mesh configuration in order to distribute processing of network data from the plurality of lower level MSEs amongst the plurality of higher level MSEs, the method comprising:

establishing at least one tunnel between each lower level MSE of the plurality of lower level MSEs and at least one other lower level MSE, wherein the plurality of lower level MSEs are for forwarding network data to a plurality of machines comprising a first group of machines that are associated with a first logical datapath set (LDPS) and a second group of machines that are associated with a second LDPS, wherein the first and second LDPSs define first and second logical switching elements (LSEs); and

establishing additional tunnels between at least two lower level MSEs and two higher level MSEs, wherein the plurality of higher level MSEs are for processing network data received from the plurality of lower level MSEs, wherein the higher level and lower level MSEs are configured to implement the first and second logical datapath sets by a set of network controllers.

13. The method of claim 12, wherein at least one lower level MSE in the plurality of lower level MSEs is for forwarding network data of a first machine in the first group of machines and of a second machine in the second group of machines towards a destination machine.

14. The method of claim 12, wherein no tunnel is established between at least one lower level MSE of the plurality of lower level MSEs and at least one higher level MSE of the plurality of higher level MSEs.

15. The method of claim 12, wherein no tunnel is established between at least a first lower level MSE and a second lower level MSE.

16. The method of claim 15 further comprising establishing a tunnel between a particular higher level MSE and each of the first lower level MSE and the second lower level MSE.

17. The method of claim 12 further comprising establishing at least one tunnel between each lower level MSE of the plurality of lower level MSEs and each higher level MSE of the plurality of higher level MSEs.

18. The method of claim 17 further comprising establishing at least one tunnel between each lower level MSE of the plurality of lower level MSEs and every other lower level MSE of the plurality of lower level MSEs.

19. The method of claim 12, wherein each machine of the plurality of machines is a virtual machine or a physical machine.

20. The method of claim 12, wherein the plurality of lower level MSEs and the plurality of higher level MSEs are software switching elements.