Array substrate, manufacturing and driving methods thereof, and display device
First Claim
1. An array substrate, comprising a base substrate and a plurality of gate lines and a plurality of data lines disposed on the base substrate, whereina plurality of pixel units distributed in an array is defined by the gate lines and the data lines;
- each pixel unit includes a common electrode, a pixel electrode and a thin-film transistor (TFT);
a first insulating layer is disposed on one side, away from the base substrate, of a layer provided with the common electrodes; and
a plurality of self-capacitance electrodes is disposed on one side, away from the base substrate, of the first insulating layer,wherein each self-capacitance electrode includes at least one first extension extending along a first direction and at least one second extension extending along a second direction, and the first direction is intercrossed with the second direction;
wherein each first extension is overlapped with and lies within one gate line in a direction perpendicular to the base substrate;
wherein the array substrate further comprises a protection layer disposed on the self-capacitance electrodes, and the protection layer and the pixel electrode are arranged in a same layer and formed with a same material;
wherein each self-capacitance electrode is electrically connected with a lead which is configured to lead out a signal of the self-capacitance electrode, the self-capacitance electrode and the lead are arranged in different layers, a second insulating layer is disposed between a layer provided with the self-capacitance electrode and the lead, and the self-capacitance electrode is electrically connected with the lead via a through hole; and
wherein the array substrate further comprises a conducting block that is disposed on the lead and electrically connected to the lead, the self-capacitance electrode and the lead are electrically connected with each other through the through hole and the conducting block, the TFT includes a first electrode and a second electrode, and the lead and the first electrode are arranged in a same first layer while the conducting block and the second electrode are arranged in a same second layer.
1 Assignment
0 Petitions
Accused Products
Abstract
An array substrate, manufacturing and driving methods thereof, and a display device are provided. The array substrate includes a base substrate and a plurality of gate lines and a plurality of data lines disposed on the base substrate. A plurality of pixel units distributed in an array are defined by the gate lines and the data lines; each pixel unit includes a common electrode, a pixel electrode and a thin-film transistor (TFT); a first insulating layer is disposed on one side of a layer provided with the common electrodes away from the base substrate; and a plurality of self-capacitance electrodes are disposed on one side of the first insulating layer away from the base substrate.
-
Citations
14 Claims
-
1. An array substrate, comprising a base substrate and a plurality of gate lines and a plurality of data lines disposed on the base substrate, wherein
a plurality of pixel units distributed in an array is defined by the gate lines and the data lines; -
each pixel unit includes a common electrode, a pixel electrode and a thin-film transistor (TFT); a first insulating layer is disposed on one side, away from the base substrate, of a layer provided with the common electrodes; and a plurality of self-capacitance electrodes is disposed on one side, away from the base substrate, of the first insulating layer, wherein each self-capacitance electrode includes at least one first extension extending along a first direction and at least one second extension extending along a second direction, and the first direction is intercrossed with the second direction; wherein each first extension is overlapped with and lies within one gate line in a direction perpendicular to the base substrate; wherein the array substrate further comprises a protection layer disposed on the self-capacitance electrodes, and the protection layer and the pixel electrode are arranged in a same layer and formed with a same material; wherein each self-capacitance electrode is electrically connected with a lead which is configured to lead out a signal of the self-capacitance electrode, the self-capacitance electrode and the lead are arranged in different layers, a second insulating layer is disposed between a layer provided with the self-capacitance electrode and the lead, and the self-capacitance electrode is electrically connected with the lead via a through hole; and wherein the array substrate further comprises a conducting block that is disposed on the lead and electrically connected to the lead, the self-capacitance electrode and the lead are electrically connected with each other through the through hole and the conducting block, the TFT includes a first electrode and a second electrode, and the lead and the first electrode are arranged in a same first layer while the conducting block and the second electrode are arranged in a same second layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
-
-
13. A method for manufacturing an array substrate, comprising:
-
forming a plurality of gate lines, a plurality of data lines, thin film transistors (TFTs), common electrodes, and pixel electrodes on a base substrate; forming a first insulating layer on one side, away from the base substrate, of the common electrode by one patterning process; and forming a plurality of self-capacitance electrodes on one side, away from the base substrate, of the first insulating layer by one patterning process, wherein a plurality of pixel units distributed in an array is defined by the gate lines and the data lines and each pixel unit includes a TFT, a common electrode and a pixel electrode, wherein each self-capacitance electrode includes at least one first extension extending along a first direction and at least one second extension extending along a second direction, and the first direction is intercrossed with the second direction; wherein each first extension is overlapped with and lies within one gate line in a direction perpendicular to the base substrate; and wherein a protection layer is disposed on the self-capacitance electrodes, and the protection layer and the pixel electrode are arranged in a same layer and formed with a same material; wherein each self-capacitance electrode is electrically connected with a lead which is configured to lead out a signal of the self-capacitance electrode, the self-capacitance electrode and the lead are arranged in different layers, a second insulating layer is disposed between a layer provided with the self-capacitance electrode and the lead, and the self-capacitance electrode is electrically connected with the lead via a through hole; and wherein the array substrate further comprises a conducting block that is disposed on the lead and electrically connected to the lead, the self-capacitance electrode and the lead are electrically connected with each other through the through hole and the conducting block, the TFT includes a first electrode and a second electrode, and the lead and the first electrode are arranged in a same first layer while the conducting block and the second electrode are arranged in a same second layer.
-
-
14. A method for driving an array substrate, comprising:
-
applying common electrode signals to common electrodes, and applying driving signals to self-capacitance electrodes, receiving feedback signals of the self-capacitance electrodes, and determining a touch position according to the feedback signals;
ordividing time for displaying one frame into a display period and a touch period, applying common electrode signals to the common electrodes in the display period and the touch period, and in the touch period, applying driving signals to the self-capacitance electrodes, receiving feedback signals of the self-capacitance electrodes, and determining the touch position according to the feedback signals; wherein both the common electrodes and the self-capacitance electrodes are disposed on the base substrate of the array substrate, a first insulating layer is disposed on one side, away from the base substrate, of the layer provided with the common electrodes, and the self-capacitance electrodes are disposed on one side, away from the base substrate, of the first insulating layer; wherein each self-capacitance electrode includes at least one first extension extending along a first direction and at least one second extension extending along a second direction, and the first direction is intercrossed with the second direction; wherein each first extension is overlapped with and lies within one gate line in a direction perpendicular to the base substrate; wherein the array substrate further comprises a protection layer disposed on the self-capacitance electrodes, and the protection layer and the pixel electrode are arranged in a same layer and formed with a same material; wherein each self-capacitance electrode is electrically connected with a lead which is configured to lead out a signal of the self-capacitance electrode, the self-capacitance electrode and the lead are arranged in different layers, a second insulating layer is disposed between a layer provided with the self-capacitance electrode and the lead, and the self-capacitance electrode is electrically connected with the lead via a through hole; and wherein the array substrate further comprises a conducting block that is disposed on the lead and electrically connected to the lead, the self-capacitance electrode and the lead are electrically connected with each other through the through hole and the conducting block, the TFT includes a first electrode and a second electrode, and the lead and the first electrode are arranged in a same first layer while the conducting block and the second electrode are arranged in a same second layer.
-
Specification