Scene understanding using a neurosynaptic system
First Claim
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1. A method comprising:
- receiving, utilizing a first neurosynaptic core circuit, an input video comprising a plurality of image frames in a first color space;
converting, utilizing a second neurosynaptic core circuit, the input video to a second color space by converting each image frame of the input video to one or more channels, wherein each channel corresponds to a dimension of the second color space, and the second color space is different from the first color space; and
converting, utilizing a third neurosynaptic core circuit, at least one pixel of at least one image frame of the one or more channels to one or more neural spikes based on a pre-determined coding scheme;
wherein each neurosynaptic core circuit comprises a plurality of electronic synapse devices interconnecting a plurality of electronic neurons to a plurality of electronic axons.
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Abstract
Embodiments of the invention provide a method for scene understanding based on a sequence of image frames. The method comprises converting each pixel of each image frame to neural spikes, and extracting features from the sequence of image frames by processing neural spikes corresponding to pixels of the sequence of image frames. The method further comprises encoding the extracted features as neural spikes, and classifying the extracted features.
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Citations
15 Claims
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1. A method comprising:
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receiving, utilizing a first neurosynaptic core circuit, an input video comprising a plurality of image frames in a first color space; converting, utilizing a second neurosynaptic core circuit, the input video to a second color space by converting each image frame of the input video to one or more channels, wherein each channel corresponds to a dimension of the second color space, and the second color space is different from the first color space; and converting, utilizing a third neurosynaptic core circuit, at least one pixel of at least one image frame of the one or more channels to one or more neural spikes based on a pre-determined coding scheme; wherein each neurosynaptic core circuit comprises a plurality of electronic synapse devices interconnecting a plurality of electronic neurons to a plurality of electronic axons. - View Dependent Claims (2, 3, 4, 5)
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6. A system comprising:
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at least one processor; and a non-transitory processor-readable memory device storing instructions that when executed by the at least one processor causes the at least one processor to perform operations including; receiving, utilizing a first neurosynaptic core circuit, an input video comprising a plurality of image frames in a first color space; converting, utilizing a second neurosynaptic core circuit, the input video to a second color space by converting each image frame of the input video to one or more channels, wherein each channel corresponds to a dimension of the second color space, and the second color space is different from the first color space; and converting, utilizing a third neurosynaptic core circuit, at least one pixel of at least one image frame of the one or more channels to one or more neural spikes based on a pre-determined coding scheme; wherein each neurosynaptic core circuit comprises a plurality of electronic synapse devices interconnecting a plurality of electronic neurons to a plurality of electronic axons. - View Dependent Claims (7, 8, 9, 10)
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11. A non-transitory computer-readable medium storing instructions that, when executed by at least one processor of a machine, cause the machine to perform operations comprising:
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receiving, utilizing a first neurosynaptic core circuit, an input video comprising a plurality of image frames in a first color space; converting, utilizing a second neurosynaptic core circuit, the input video to a second color space by converting each image frame of the input video to one or more channels, wherein each channel corresponds to a dimension of the second color space, and the second color space is different from the first color space; and converting, utilizing a third neurosynaptic core circuit, at least one pixel of at least one image frame of the one or more channels to one or more neural spikes based on a pre-determined coding scheme; wherein each neurosynaptic core circuit comprises a plurality of electronic synapse devices interconnecting a plurality of electronic neurons to a plurality of electronic axons. - View Dependent Claims (12, 13, 14, 15)
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Specification