Voltage regulation circuit for an RFID circuit

• US 10,043,124 B2
• Filed: 12/15/2016
• Issued: 08/07/2018
• Est. Priority Date: 12/15/2016
• Status: Active Grant

• Current Assignee: EM Microelectronic - Marin SA (The Swatch Group AG)
• Original Assignee: EM Microelectronic - Marin SA (The Swatch Group AG)
• Inventors: Buescher, Kevin Scott
• Primary Examiner(s): Labaze, Edwyn
• Application Number:
  US15/380,663
• Publication Number:
  US 20180174010A1
• Time in Patent Office: 600 Days
• Field of Search: 235492, 235375, 235487, 235451, 235380
• CPC Class Codes: G05F 1/56 using semiconductor devices in series with the load as final control devices G05F1/461 takes precedence
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs

Abstract

The present invention relates in one aspect to a voltage regulation circuit for an RFID circuit (10), the voltage regulation circuit comprising:

• • an input (20) connectable to a rectifier circuit (14),
  • an output (22) connectable to a processor (18) of the RFID circuit,
  • at least one switch (24) arranged between the input (20) and the output (22) and connected to the input (20) and the output (22), wherein the switch (24) is capable to electrically connect the output (22) to the input (20) and to disconnect the output (22) from the input (20).

Claims

1. A voltage regulation circuit for an RFID circuit, the voltage regulation circuit comprising:

an input connectable to a rectifier circuit,

an output connectable to a processor of the RFID circuit,

at least one switch arranged between the input and the output and connected to the input and the output, wherein the switch is capable to electrically connect the output to the input and to disconnect the output from the input, the at least one switch comprising

a switch MOSFET transistor having a drain connected to the output and a source connected to the input, and

a diode connected directly between the drain and the source of the MOSFET transistor.

2. The voltage regulation circuit according to claim 1, further comprising an input capacitor connected to the input.

3. The voltage regulation circuit according to claim 2, wherein a capacitance of an output capacitor connected to the output is at least 10 times, 100 times or 1000 times larger than the capacitance of the input capacitor.

4. The voltage regulation circuit according to claim 1, further comprising an output capacitor connected to the output.

5. The voltage regulation circuit according to claim 1, wherein an anode of the diode is connected to the source of the switch MOSFET transistor and wherein a cathode of the diode is connected to the drain of the switch MOSFET transistor and to a bulk of the switch MOSFET transistor.

6. The voltage regulation circuit according to claim 1, further comprising a current mirror having a first mirror MOSFET transistor and a second mirror MOSFET transistor, wherein a gate of the first mirror MOSFET transistor is connected to a gate of the second mirror MOSFET transistor.

7. The voltage regulation circuit according to claim 6, wherein a source of the first mirror MOSFET transistor is connected to the output and wherein a source of the second mirror MOSFET transistor is connected to the input.

8. The voltage regulation circuit according to claim 6, wherein a drain of the first mirror MOSFET transistor is connected to the gate of the switch MOSFET transistor.

9. The voltage regulation circuit according to claim 6, wherein a drain of the second mirror MOSFET transistor is connected to the gate of the second mirror MOSET transistor.

10. The voltage regulation circuit according to claim 6, further comprising a first biasing MOSFET transistor and a second biasing MOSFET transistor, wherein a gate of the first biasing MOSFET transistor is connected to the input and wherein a gate of the second biasing MOSFET transistor is connected to the output.

11. The voltage regulation circuit according to claim 10, wherein a drain of the first biasing MOSFET transistor is connected to a drain of the first mirror MOSFET transistor and a drain of the second biasing MOSFET transistor is connected to a drain of the second mirror MOSFET transistor.

12. An RFID circuit comprising an antenna, a rectifier circuit connected to the antenna, a processor and a voltage regulation circuit according to claim 1, wherein the input of the voltage regulation circuit is connected to an output of the rectifier circuit and wherein the output of the voltage regulation circuit is connected to an input of the processor.

13. A portable electronic device comprising at least one RFID circuit according to claim 12.

14. The voltage regulation circuit according to claim 1, further comprising a circuit connected in parallel with the drain and the source of the switch MOSFET transistor, the circuit including at least two transistors.