Semiconductor device and method for manufacturing the same

• US 10,043,915 B2
• Filed: 02/15/2017
• Issued: 08/07/2018
• Est. Priority Date: 10/09/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Koyama, Jun, Takahashi, Masahiro, Kishida, Hideyuki, Miyanaga, Akiharu, Sugao, Junpei, Uochi, Hideki, Nakamura, Yasuo
• Primary Examiner(s): CHAUDHARI, CHANDRA P
• Application Number:
  US15/432,977
• Publication Number:
  US 20170162700A1
• Time in Patent Office: 538 Days
• Field of Search: 257 72
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
• CPC Class Codes: H01L 21/76828 thermal treatment
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

Claims

1. A semiconductor device comprising:

a first conductive layer containing copper over a substrate;

a first insulating layer containing silicon nitride over the first conductive layer;

a second insulating layer containing silicon oxide over the first insulating layer;

an oxide semiconductor layer over the second insulating layer;

a second conductive layer containing titanium, wherein the second conductive layer is in direct contact with the oxide semiconductor layer; and

a third conductive layer containing copper over the second conductive layer,

wherein a side edge of the third conductive layer is inside a side edge of the second conductive layer in a cross section of the semiconductor device, and

wherein a length of a top surface of the third conductive layer is shorter than a length of a bottom surface of the third conductive layer in the cross section of the semiconductor device.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer contains at least one of indium, gallium, and zinc.

3. The semiconductor device according to claim 1, wherein the third conductive layer does not overlap the oxide semiconductor layer.

4. The semiconductor device according to claim 1, wherein the semiconductor device is incorporated in one selected from the group consisting of electronic paper, an advertisement, an electronic book reader, a television set, a digital photo frame, a portable amusement machine, a slot machine, a portable computer, and a cellular phone.

15. The semiconductor device according to claim 1, further comprising a third insulating layer over the oxide semiconductor layer,

wherein the second conductive layer is over and in direct contact with the third insulating layer.

16. The semiconductor device according to claim 1, further comprising:

a third insulating layer over the oxide semiconductor layer; and

a fourth insulating layer over the third conductive layer,

wherein the second conductive layer is over and in direct contact with the third insulating layer, and

wherein the fourth insulating layer is in direct contact with the side edge of the third conductive layer.

5. A semiconductor device comprising:

a first conductive layer containing copper over a substrate;

a first insulating layer containing silicon nitride over the first conductive layer;

a second insulating layer containing silicon oxide over the first insulating layer;

an oxide semiconductor layer over the second insulating layer;

a second conductive layer containing titanium, wherein the second conductive layer is in direct contact with the oxide semiconductor layer; and

a third conductive layer containing copper over the second conductive layer,

wherein the second conductive layer extends beyond a side edge of the third conductive layer in a cross section of the semiconductor device,

wherein a length of a top surface of the third conductive layer is shorter than a length of a bottom surface of the third conductive layer in the cross section of the semiconductor device, and

wherein each side surface of the second conductive layer and the third conductive layer has a tapered side surface.

6. The semiconductor device according to claim 5, wherein the oxide semiconductor layer contains at least one of indium, gallium, and zinc.

7. The semiconductor device according to claim 5, wherein the third conductive layer does not overlap the oxide semiconductor layer.

8. The semiconductor device according to claim 5, wherein the semiconductor device is incorporated in one selected from the group consisting of electronic paper, an advertisement, an electronic book reader, a television set, a digital photo frame, a portable amusement machine, a slot machine, a portable computer, and a cellular phone.

17. The semiconductor device according to claim 5, further comprising a third insulating layer over the oxide semiconductor layer,

wherein the second conductive layer is over and in direct contact with the third insulating layer.

18. The semiconductor device according to claim 5, further comprising:

a third insulating layer over the oxide semiconductor layer; and

a fourth insulating layer over the third conductive layer,

wherein the second conductive layer is over and in direct contact with the third insulating layer, and

wherein the fourth insulating layer is in direct contact with the side edge of the third conductive layer.

9. A semiconductor device comprising:

a first conductive layer containing copper over a substrate;

a first insulating layer containing silicon nitride over the first conductive layer;

a second insulating layer containing silicon oxide over the first insulating layer;

an oxide semiconductor layer over the second insulating layer;

a second conductive layer containing titanium, wherein the second conductive layer is in direct contact with the oxide semiconductor layer; and

a third conductive layer containing copper over the second conductive layer,

wherein a side surface of the third conductive layer is over a top surface of the second conductive layer in a cross section of the semiconductor device, and

wherein a length of a top surface of the third conductive layer is shorter than a length of a bottom surface of the third conductive layer in the cross section of the semiconductor device.

10. The semiconductor device according to claim 9, wherein the oxide semiconductor layer contains at least one of indium, gallium, and zinc.

11. The semiconductor device according to claim 9, wherein the third conductive layer does not overlap the oxide semiconductor layer.

12. The semiconductor device according to claim 9, wherein the semiconductor device is incorporated in one selected from the group consisting of electronic paper, an advertisement, an electronic book reader, a television set, a digital photo frame, a portable amusement machine, a slot machine, a portable computer, and a cellular phone.

13. The semiconductor device according to claim 9, further comprising a third insulating layer over the oxide semiconductor layer,

wherein the second conductive layer is over and in direct contact with the third insulating layer.

14. The semiconductor device according to claim 9, further comprising:

a third insulating layer over the oxide semiconductor layer; and

a fourth insulating layer over the third conductive layer,

wherein the second conductive layer is over and in direct contact with the third insulating layer, and

wherein the fourth insulating layer is in direct contact with the side surface of the third conductive layer.