Nonvolatile memory recovery after power failure during write operations or erase operations

• US 10,048,879 B2
• Filed: 10/20/2016
• Issued: 08/14/2018
• Est. Priority Date: 03/14/2013
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Chen, Zhengang, Cohen, Earl T., Tang, Alex G.
• Primary Examiner(s): Tran, Anthan
• Assistant Examiner(s): Siddique, Mushfique
• Application Number:
  US15/298,636
• Publication Number:
  US 20170038985A1
• Time in Patent Office: 663 Days
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/225 Preventing erasure, programming or reading when power supply voltages are outside the required ranges
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 7/24 Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
• CPC Class Codes: G11C 8/20 Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access

Abstract

A method for recovery after a power failure. The method generally includes a step of searching at least some of a plurality of pages of a memory to find a first erased page in response to an unsafe power down. A step may move stored data located between a particular word line in the memory that contains the first erased page and a previous word line that is at least two word lines before the particular word line. Another step may write new data starting in a subsequent word line that is the at least two word lines after the particular word line that contains the first erased page.

Claims

1. A method for recovery after a power failure, comprising the steps of:

searching at least some of a plurality of pages of a memory to find a first erased page in response to an unsafe power down;

moving stored data located between a particular word line in the memory that contains the first erased page and a previous word line that is at least two word lines before the particular word line; and

writing new data starting in a subsequent word line that is at least two word lines after the particular word line that contains the first erased page.

2. The method according to claim 1, wherein the stored data is moved by:

reading the stored data;

generating corrected data by correcting the stored data; and

writing the corrected data in the memory at or beyond the subsequent word line.

3. The method according to claim 1, further comprising the step of:

writing random data between the particular word line and the subsequent word line.

4. The method according to claim 3, wherein each upper page between the particular word line and the subsequent word line that has a corresponding lower page that is programmed is bypassed when the random data is written.

5. The method according to claim 1, further comprising the step of:

restoring a map of the memory using data located prior to the previous word line.

6. The method according to claim 1, further comprising the step of:

leaving one or more of the plurality of pages between the particular word line and the subsequent word line in an erased state.

7. The method according to claim 1, wherein the new data is written in a same block of the memory that contains the first erased page.

8. The method according to claim 1, wherein the plurality of pages are searched starting in a block of the memory last written in before the unsafe power down.

9. The method according to claim 1, wherein the steps are performed in a solid-state drive.

10. An apparatus comprising:

a memory configured to store data; and

a controller configured to

process a plurality of input/output requests to read/write to/from the memory,

search at least some of a plurality of pages of the memory to find a first erased page in response to an unsafe power down,

move stored data located between a particular word line in the memory that contains the first erased page and a previous word line that is at least two word lines before the particular word line, and

write new data starting in a subsequent word line that is at least two word lines after the particular word line that contains the first erased page.

11. The apparatus according to claim 10, wherein the controller moves the stored data by

reading the stored data,

generating corrected data by correcting the stored data, and

writing the corrected data in the memory at or beyond the subsequent word line.

12. The apparatus according to claim 10, wherein the controller is further configured to

write random data between the particular word line and the subsequent word line.

13. The apparatus according to claim 12, wherein each upper page between the particular word line and the subsequent word line that has a corresponding lower page that is programmed is bypassed when the random data is written.

14. The apparatus according to claim 10, wherein the controller is further configured to

restore a map of the memory using data located prior to the previous word line.

15. The apparatus according to claim 10, wherein the controller is further configured to

leave one or more of the plurality of pages between the particular word line and the subsequent word line in an erased state.

16. The apparatus according to claim 10, wherein the controller is further configured to

write the new data in a same block of the memory that contains the first erased page.

17. The apparatus according to claim 10, wherein the controller is further configured to

search the plurality of pages starting in a block of the memory last written in before the unsafe power down.

18. The apparatus according to claim 10, wherein the memory and the controller are part of a solid-state drive.

19. An apparatus comprising:

an interface configured to process a plurality of read/write operations to/from a memory; and

a control circuit configured to

search at least some of a plurality of pages of the memory to find a first erased page in response to an unsafe power down,

move stored data located between a particular word line in the memory that contains the first erased page and a previous word line that is at least two word lines before the particular word line, and

write new data starting in a subsequent word line that is at least two word lines after the particular word line that contains the first erased page.

20. The apparatus according to claim 19, wherein the interface and the control circuit are part of a solid-state drive.