Techniques for dynamically determining performance of read reclaim operations

• US 10,049,757 B2
• Filed: 04/24/2017
• Issued: 08/14/2018
• Est. Priority Date: 08/11/2016
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: Zhang, Fan, Cai, Yu, Xiong, Chenrong, Bhatia, Aman, Kim, HyungSeok, Pignatelli, David
• Primary Examiner(s): Tran, Michael
• Application Number:
  US15/495,590
• Publication Number:
  US 20180047456A1
• Time in Patent Office: 477 Days
• Field of Search: 36518502, 36518524
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/3431 Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 16/3495 Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
• CPC Class Codes: G11C 29/42 using error correcting codes [ECC] or parity check
• CPC Class Codes: G11C 29/44 Indication or identification of errors, e.g. for repair
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

Disclosed are techniques for determining a threshold number of read operations on memory depending on one or more conditions of the memory. If a number of read operations for the memory meets the threshold number of read operations, a read reclaim operation can be performed to preserve data stored therein.

Claims

1. A device, comprising:

a flash memory comprising memory cells, the memory cells arranged such that reading a selected memory cell includes applying a voltage to the selected memory cell, wherein the voltage is also applied to one or more memory cells other than the selected memory cell;

a controller coupled to the memory, the controller configured to;

determine one or more conditions of one or more of the memory cells;

access a plurality of threshold numbers of read operations stored in the memory;

select from the plurality of threshold numbers of read operations, based on the one or more conditions, a threshold number of read operations that triggers a read reclaim operation, wherein the read reclaim operation comprises copying data values from the one or more cells to another one or more cells to prevent the data values from being corrupted;

determine a number of read operations that has been performed on the one or more of the memory cells, wherein the one or more conditions are separate and distinct from the number of read operations;

determine whether the number of read operations meets the threshold number of read operations; and

in response to determining that the number of read operations meets the threshold number of read operations, perform the read reclaim operation.

2. The device of claim 1, wherein the controller is further configured to:

in response to determining that the number of read operations does not meet the threshold number of read operations, not perform the read reclaim operation.

3. The device of claim 1, wherein the controller is further configured to:

determine the threshold number of read operations from a baseline number of read operations, including modifying the baseline number of read operations based on the one or more conditions.

4. The device of claim 3, wherein the baseline number of read operations is determined based on an end-of-life projection for the one or more of the memory cells.

5. The device of claim 4, wherein the end-of-life projection is based on at least one of:

a worst case number of program erase cycles that the one or more of the memory cells is anticipated to be subjected to over an operational lifetime;

or

a worst case retention time for the one or more of the memory cells to store data without degradation.

6. The device of claim 1, wherein the one or more conditions include a number of program and erase cycles that the one or more memory cells have been subjected to, wherein the controller is configured to keep track of the number of program and erase cycles that the one or more memory cells have been subjected to.

7. The device of claim 1, wherein the one or more conditions include a retention time that the one or more cells have maintained a value of data stored therein, wherein the retention time is based on a time that the memory cell was last written to, wherein the controller is configured to keep track of the time that the memory cell is last written to.

8. The device of claim 1, wherein the one or more conditions include a temperature determined by a sensor coupled to the memory.

9. The device of claim 1, wherein the one or more conditions include a humidity determined by a sensor coupled to the memory.

10. The device of claim 1, wherein the controller is configured to access a table stored in the memory to access a plurality of threshold numbers of read operations stored in the memory as functions of the one or more conditions of the memory cell.

11. The device of claim 10, wherein the table comprises decreasing threshold number of memory read operations for increasing retention time, wherein the retention time is a time that the memory cell was last written to.

12. The device of claim 10, wherein the table comprises decreasing threshold number of memory read operations for increasing number of program/erase cycles that the one or more memory cells have been subjected to.

13. The device of claim 1, wherein the controller is further configured to:

store a plurality of threshold numbers of read operations, each of the plurality of threshold numbers of read operations corresponding to a set of one or more conditions of the memory cells; and

wherein determining the threshold number of read operations includes selecting, from the plurality of threshold numbers of read operations, the threshold number of read operations.

14. The device of claim 1, wherein the memory cells are arranged in a planar array wherein the one or more memory cells are addressed via row and column addressing.

15. A non-transitory computer readable medium storing instructions that, when executed by one or more processors, cause the one or more processors to:

determine one or more conditions of one or more of memory cells of a flash memory, the memory cells arranged such that reading a selected memory cell includes applying a voltage to the selected memory cell, wherein the voltage is also applied to one or more memory cells other than the selected memory cell;

determine a threshold number of read operations from a baseline number of read operations, including modifying the baseline number of read operations based on the one or more conditions, the threshold number of read operations triggering a read reclaim operation, wherein the read reclaim operation comprises copying data values from the one or more cells to another one or more cells to prevent the data values from being corrupted;

determine a number of read operations performed that has been performed on the one or more of the memory cells, wherein the one or more conditions are separate and distinct from the number of read operations;

determine whether the number of read operations meets the threshold number of read operations; and

in response to determining that the number of read operations meets the threshold number of read operations, perform the read reclaim operation.

16. The non-transitory computer readable medium of claim 15, wherein the instructions further cause the one or more processors to determine one or more values corresponding to a respective one of the one or more conditions during operation of the one or more memory cells.

17. The non-transitory computer readable medium of claim 15, wherein the memory is flash memory;

and

wherein the reading the value of one of the memory cells includes applying a voltage to the others of the memory cells includes applying a voltage to a wordline of the flash memory.

18. A method, comprising:

determine one or more conditions of one or more of memory cells of a flash memory, the memory cells arranged such that reading a selected memory cell includes applying a voltage to the selected memory cell, wherein the voltage is also applied to one or more memory cells other than the selected memory cell;

store a plurality of threshold numbers of read operations, each of the plurality of threshold numbers of read operations corresponding to a set of one or more conditions of the memory cells;

determining, based on the one or more conditions, a threshold number of read operations, from the plurality of threshold numbers of read operations, prior to performing a read reclaim operation, wherein the read reclaim operation comprises copying data values from the one or more cells to another one or more cells to prevent the data values from being corrupted;

determining a number of read operations performed on one or more of the memory cells, wherein the one or more conditions are separate and distinct from the number of read operations;

determining whether the number of read operations meets the threshold number of read operations; and

in response to determining that the number of read operations meets the threshold number of read operations, performing the read reclaim operation.

19. The method of 18, further comprising dynamically determining one or more values corresponding to a respective one of the one or more conditions during operation of the one or more memory cells.

20. The method of 18, wherein the memory is flash memory;

and

wherein the reading the value of one of the memory cells includes applying a voltage to the others of the memory cells and includes applying a voltage to a wordline of the flash memory.