FDSOI channel control by implanted high-K buried oxide

• US 10,049,917 B2
• Filed: 09/19/2016
• Issued: 08/14/2018
• Est. Priority Date: 09/19/2016
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Steinmann, Philipp, Javorka, Peter
• Primary Examiner(s): Han, Jonathan
• Application Number:
  US15/269,023
• Publication Number:
  US 20180082889A1
• Time in Patent Office: 694 Days
• Field of Search: 257E27112, 257351, 257347, 438154
• CPC Class Codes: H01L 21/02181 the material containing hafnium, e.g. HfO2
• CPC Class Codes: H01L 21/02183 the material containing tantalum, e.g. Ta2O5
• CPC Class Codes: H01L 21/02186 the material containing titanium, e.g. TiO2
• CPC Class Codes: H01L 21/02189 the material containing zirconium, e.g. ZrO2
• CPC Class Codes: H01L 21/02321 introduction of substances into an already existing insulating layer H01L21/02227 and subgroups take precedence
• CPC Class Codes: H01L 21/31155 by ion implantation
• CPC Class Codes: H01L 21/76283 Lateral isolation by refilling of trenches with dielectric material
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence

Abstract

Methods of locally changing the BOX layer of a MOSFET device to a high-k layer to provide different Vts with one backside voltage and the resulting device are provided. Embodiments include providing a Si substrate having a BOX layer formed over the substrate and a SOI layer formed over the BOX layer; implanting a high current of dopants into at least one portion of the BOX layer; performing a high-temperature anneal of the BOX layer; forming first and second fully depleted silicon-on-insulator (FDSOI) transistors on the SOI layer, the first FDSOI transistors formed above either the BOX layer or the at least one portion of the BOX layer and the second FDSOI transistors formed above the at least one portion of the BOX layer; and applying a single voltage across a backside of the Si substrate.

Claims

1. A method comprising:

providing a silicon (Si) substrate having a buried oxide (BOX) layer formed over the substrate and a silicon-on-insulator (SOI) layer formed over the BOX layer;

implanting a high current of dopants into at least one portion of the BOX layer;

performing a high-temperature anneal of the BOX layer;

forming first and second fully depleted silicon-on-insulator (FDSOI) transistors on the SOI layer, wherein the BOX layer below the first FDSOI transistors is either implanted with a first dopant, forming a high-k layer, or is non-implanted, and the BOX layer below the second FDSOI transistors is implanted with a second dopant, forming a high-k layer, the first and second dopants being different; and

applying a single voltage across a backside of the Si substrate,

wherein the second dopant comprises hafnium (Hf), zirconium (Zr), titanium (Ti), or tantalum (Ta).

2. The method according to claim 1, comprising forming the BOX layer of silicon oxide (SiO_x, 1<

x<

3).

3. The method according to claim 1, comprising controlling a threshold voltage (Vt) of each of the first and second FDSOI transistors based on whether a FDSOI transistor is formed over the BOX layer or the at least one portion of the BOX layer and on a concentration of the implanted dopants in the at least one portion of the BOX layer underlying the FDSOI transistor.

4. The method according to claim 1, comprising implanting the high current of dopants into the at least one portion of the BOX layer by:

forming a photoresist layer over the SOI layer;

patterning the photoresist layer;

performing a high-current implant through the photoresist layer; and

removing the photoresist layer prior to performing the high-temperature anneal.

5. The method according to claim 1, wherein the at least one implanted portion of the BOX layer is implanted with different dopants under the first and second FDSOI transistors.

6. The method according to claim 1, comprising applying different voltages to the backside of the Si substrate based on different BOX regions above the substrate.

7. The method according to claim 1, comprising implanting a high current of multiple dopants of a same species with different implant energies into the at least one portion of the BOX layer.

8. The method according to claim 1, comprising implanting the dopant at a dosage of 5e15 per centimeter squared (cm²) to 1e17/cm².

9. The method according to claim 8, comprising selecting the dosage based on a desired Vt for the FDSOI transistor.

10. The method according to claim 1, comprising implanting multiple portions of the BOX layer, each portion at a different dosage for a different Vt.

11. A method comprising:

providing a silicon (Si) substrate having a silicon oxide (SiO_x, 1<

x<

3) buried oxide (BOX) layer formed over the substrate and a SOI layer formed over the SiO_x, 1<

x<

3 BOX layer, the SiO_x, 1<

x<

3 BOX layer having a substantially uniform thickness;

forming a photoresist layer over the SOI layer;

patterning the photoresist layer;

implanting at least one portion of the SiO_x, 1<

x<

3 BOX layer with a dopant comprising hafnium (Hf), zirconium (Zr), titanium (Ti), or tantalum (Ta) at a dosage of 5e15 per centimeter square (cm²) to 1e17/cm² through the patterned photoresist layer to form a high-k BOX layer;

stripping the photoresist layer;

annealing the SiO_x, 1<

x<

3 BOX layer;

forming shallow trench isolation (STI) regions through the SOI and/or the SiO_x, 1<

x<

3 BOX layers;

forming first and second fully depleted silicon-on-insulator (FDSOI) transistors on the SOI layer, the first FDSOI transistors formed above either the SiO_x, 1<

x<

3 BOX layer or the at least one implanted portion of the SiO_x, 1<

x<

3 BOX layer and the second FDSOI transistors formed above the at least one implanted portion of the SiO_x, 1<

x<

3 high-k BOX layer; and

applying a single voltage across a backside of the Si substrate.

12. The method according to claim 11, comprising controlling a threshold voltage (Vt) of each of the first and second FDSOI transistors based on whether a FDSOI transistor is formed over the SiO_x, 1<

x<

3 BOX layer or the at least one portion of the SiO_x, 1<

x<

3 BOX layer and on a concentration of the implanted dopant in the SiO_x, 1<

x<

3 BOX layer underlying the FDSOI transistor.

13. The method according to claim 11, comprising selecting the dosage based on a desired Vt for the FDSOI transistor.

14. The method according to claim 11, comprising implanting multiple portions of the SiO_x, 1<

x<

3 BOX layer, each portion at a different dosage for a different Vt.

15. The method according to claim 11, wherein the at least one implanted portion of the SiO_x, 1<

x<

3 BOX layer is implanted with different dopants under the first and second FDSOI transistors.