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Second order harmonic cancellation for radio frequency front-end switches

  • US 10,050,662 B2
  • Filed: 07/27/2017
  • Issued: 08/14/2018
  • Est. Priority Date: 05/08/2013
  • Status: Active Grant
First Claim
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1. A radio frequency single pole, triple throw switch, comprising:

  • a common pole terminal;

    a first signal terminal;

    a first control line terminal;

    a first transistor with a body, a source connected to the first signal terminal, a drain connected to the common pole terminal, and a gate connected to the first control line terminal, the first transistor being selectively activatable in response to a first enable signal applied to the first control line terminal;

    a first transistor harmonic suppression capacitor connected across the body and the drain of the first transistor;

    a first inductor connected in parallel to the source and the drain of the first transistor, the first inductor and the first transistor harmonic suppression capacitor defining a first tank circuit with the first transistor in a deactivated state, the first tank circuit blocking radio frequency signals on the drain of the first transistor;

    a second signal terminal;

    a second control line terminal;

    a second transistor with a body, a source connected to the second signal terminal, a drain connected to the common pole terminal, and a gate connected to the second control line terminal, the second transistor being selectively activatable in response to a second enable signal applied to the first control line terminal;

    a second transistor harmonic suppression capacitor connected across the body and the drain of the second transistor;

    a second inductor connected in parallel to the source and the drain of the second transistor, the second inductor and the second harmonic suppression capacitor defining a second tank circuit with the second transistor in a deactivated state, the second tank circuit blocking radio frequency signals on the drain of the second transistor;

    a third signal terminal;

    a third control line terminal;

    a third transistor with a body, a source connected to the third signal terminal, a drain connected to the common pole terminal, and a gate connected to the third control line terminal, the third transistor being selectively activatable in response to a third enable signal applied to the third control line terminal;

    a third transistor harmonic suppression capacitor connected across the body and the drain of the third transistor; and

    a third inductor connected in parallel to the source and the drain of the third transistor, the third inductor and the third harmonic suppression capacitor defining a third tank circuit with the third transistor in a deactivated state, the third tank circuit blocking radio frequency signals on the drain of the third transistor.

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