Pseudo SOI process

• US 10,053,360 B1
• Filed: 08/24/2017
• Issued: 08/21/2018
• Est. Priority Date: 08/11/2017
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: Kionix Incorporated (ROHM Co., Ltd.)
• Inventors: Heller, Martin
• Primary Examiner(s): Booth, Richard
• Application Number:
  US15/685,879
• Time in Patent Office: 362 Days
• CPC Class Codes: B81C 1/00047 Cavities
• CPC Class Codes: B81C 1/00095 Interconnects
• CPC Class Codes: B81C 2201/0109 Sacrificial layers not provided for in B81C2201/0107 - B81C2201/0108
• CPC Class Codes: B81C 2201/0115 Porous silicon
• CPC Class Codes: B81C 2201/0132 Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
• CPC Class Codes: B81C 2201/0171 Doping materials
• CPC Class Codes: B81C 2201/0178 Oxidation

Abstract

A method of processing a semiconductor substrate having a first conductivity type includes, in part, forming a first implant region of a second conductivity type in the semiconductor substrate where the first implant region is characterized by a first depth, forming a second implant region of the first conductivity type in the semiconductor substrate where the second implant region is characterized by a second depth smaller than the first depth, forming a porous layer within the semiconductor substrate where the porous layer is adjacent the first implant region, and growing an epitaxial layer on the semiconductor substrate thereby causing the porous layer to collapse and form a cavity.

Claims

1. A method of processing a semiconductor substrate having a first conductivity type, the method comprising:

forming a first implant region of a second conductivity type in the semiconductor substrate, said first implant region characterized by a first depth;

forming a second implant region of the first conductivity type in the semiconductor substrate, said second implant region characterized by a second depth smaller than the first depth;

forming a porous layer within the semiconductor substrate, said porous layer being adjacent the first implant region; and

growing an epitaxial layer on the semiconductor substrate thereby causing the porous layer to collapse and form a cavity.

2. The method of claim 1 further comprising:

forming a third implant region of the second conductivity type in the semiconductor substrate, said third implant region characterized by a second depth greater than the first depth.

3. The method of claim 2 further comprising:

forming a plurality of trenches in the epitaxial layer positioned above the cavity; and

filling the plurality of trenches with an insulating material.

4. The method of claim 3 further comprising:

forming at least one through-silicon via (TSV) in the semiconductor substrate prior to the growing of the epitaxial layer.

5. The method of claim 2 further comprising:

forming a layer of insulating material along the sidewalls of the TSV prior to the growing of the epitaxial layer.

6. The method of claim 5 further comprising:

forming a layer of metal over the insulating material disposed on the sidewalls of the TSV prior to the growing of the epitaxial layer.

7. The method of claim 6 further comprising:

forming a plurality of isolation joints in the epitaxial layer, each isolation joint making contact with the insulating material disposed on the sidewalls of the TSV.

8. The method of claim 7 further comprising:

forming a trench in the epitaxial layer and around outside periphery of the plurality of isolation joints.

9. The method of claim 4 further comprising:

forming a layer of insulating material on the semiconductor substrate and around an opening of the TSV, the first layer of insulating material being formed prior to the growing of the epitaxial layer.

10. The method of claim 9 further comprising:

forming a layer of insulating material along the sidewalls of the TSV and prior to the growing of the epitaxial layer.

11. The method of claim 10 further comprising:

forming a layer of metal over the insulating material disposed on the sidewalls of the TSV prior to the growing of the epitaxial layer.

12. The method of claim 11 further comprising:

forming a plurality of isolation joints in the epitaxial layer, each isolation joint making contact with the insulating material disposed on the sidewalls of the TSV.

13. The method of claim 12 further comprising:

forming a trench in the epitaxial layer and around outside periphery of the plurality of isolation joints.

14. The method of claim 2 wherein said first conductivity type is p-type and said second conductivity type is n-type.