Selective copyback for on die buffered non-volatile memory

• US 10,055,294 B2
• Filed: 01/09/2015
• Issued: 08/21/2018
• Est. Priority Date: 01/09/2014
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Inventors: Hyun, Jea, Wood, Robert
• Primary Examiner(s): Cardwell, Eric
• Application Number:
  US14/593,938
• Publication Number:
  US 20150193299A1
• Time in Patent Office: 1,320 Days
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 2211/5641 Multilevel memory having cells with different number of storage levels
• CPC Class Codes: G11C 29/021 in voltage or current generators
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

Apparatuses, systems, methods, and computer program products are disclosed for on die buffered non-volatile memory management. A method includes storing data in a first set of non-volatile memory cells. A method includes determining one or more attributes associated with data. A method includes determining whether to store data in a second set of non-volatile memory cells based on one or more attributes. A second set of non-volatile memory cells may be configured to store more bits per cell than a first set of non-volatile memory cells.

Claims

1. A method comprising:

storing data in a first set of non-volatile memory cells;

determining one or more attributes associated with the data;

determining whether to store the data in a second set of non-volatile memory cells based on the one or more attributes associated with the data, the second set of non-volatile memory cells configured to store more bits per cell than the first set of non-volatile memory cells;

aborting storing of the data in the second set of non-volatile memory cells in response to a power level failing to satisfy a threshold; and

accessing the data from the first set of non-volatile memory cells after recovery from the power level failing.

2. The method of claim 1, wherein determining the one or more attributes associated with the data comprises reading at least a subset of the data from the first set of non-volatile memory cells and factoring in results of the reading of the at least a subset to determine the one or more attributes.

3. The method of claim 1, wherein the one or more attributes associated with the data comprise one or more of a write frequency for the data, a read frequency for the data, a quality-of-service level for the data, an age for the data, an error rate for the data, a capacity threshold being satisfied for the first set of non-volatile memory cells, and a program/erase cycle count for the first set of non-volatile memory cells.

4. The method of claim 1, wherein the first set of non-volatile memory cells comprises single level cells and the second set of non-volatile memory cells comprises triple level cells.

5. The method of claim 1, wherein at least some of the data is stored in the second set of non-volatile memory cells from the first set internally within an integrated circuit die without the at least some of the data leaving a package of the integrated circuit die.

6. The method of claim 1, further comprising storing the data in the second set of non-volatile memory cells using an internal data transfer command of a non-volatile memory element comprising the first and second sets of non-volatile memory cells.

7. The method of claim 1, further comprising adjusting one or more read voltage thresholds for the first set of non-volatile memory cells based on one or more storage media characteristics for the first set of non-volatile memory cells and using the adjusted one or more read voltage thresholds to read the data from the first set of non-volatile memory cells for storing in the second set of non-volatile memory cells.

8. The method of claim 1, further comprising determining, based on the one or more attributes, whether to perform an error-correcting code (ECC) decode for the data from the first set of non-volatile memory cells and an ECC re-encode for the data for storing the data in the second set of non-volatile memory cells.

9. The method of claim 1, further comprising maintaining a first logical-to-physical mapping for a location of the data in the first set of non-volatile memory cells and maintaining a second logical-to-physical mapping for a location of the data in the second set of non-volatile memory cells.

10. The method of claim 1, further comprising verifying data integrity of the data in the second set of non-volatile memory cells in response to a trigger.

11. The method of claim 10, wherein the trigger comprises at least one of verifying storage of the data in the second set of non-volatile memory cells, verifying data integrity of the data in the second set of non-volatile memory cells, a read request for the data, a background scan of the second set of non-volatile memory cells, a storage capacity threshold being satisfied, and a storage capacity recovery event for the first set of non-volatile memory cells.

12. The method of claim 1, further comprising recovering storage capacity of the first set of non-volatile memory cells in response to an access rate for the data failing to satisfy an access threshold.

13. The method of claim 1, further comprising retaining the data stored in the first set of non-volatile memory cells after storing the data in the second set of non-volatile memory cells to service one or more read requests for the data using the first set of non-volatile memory cells based on a quality-of-service level for the data.

14. The method of claim 1, further comprising erasing the data from the first set of non-volatile memory cells and recovering storage capacity of the first set of non-volatile memory cells in response to a quality-of-service level for the data failing to satisfy a threshold.

15. The method of claim 1, further comprising recovering storage capacity of the first set of non-volatile memory cells in response to a storage capacity threshold being satisfied.

16. The method of claim 1, further comprising erasing the second set of non-volatile memory cells after recovery from the power level failing.

17. The method of claim 1, further comprising marking the second set of non-volatile memory cells as filled in response to storing the data in the second set of non-volatile memory cells and erasing one or more sets of non-volatile memory cells not marked as filled after recovery from a power level failing to satisfy a threshold.

18. The method of claim 1, further comprising aborting an in-process copyback procedure for the data in response to determining not to store the data in the second set of non-volatile memory cells based on the one or more attributes.

19. An apparatus comprising:

a buffer module configured to store data in a first set of non-volatile storage cells;

a copyback module configured to determine whether to store the data in a second set of non-volatile storage cells based on one or more data factors, the second set of non-volatile storage cells representing data using more storage states per cell than the first set of non-volatile storage cells; and

a power-cut module configured to abort the copyback module storing the data in the second set of non-volatile storage cells in response to a power level failing to satisfy a threshold, the abort causing the data to be accessed from the first set of non-volatile storage cells after recovery from the power level failing.

20. The apparatus of claim 19, further comprising a refresh module configured to determine whether to perform an error-correcting code (ECC) refresh for the data for storing the data in the second set of non-volatile storage cells based on the one or more data factors, the ECC refresh comprising the refresh module decoding one or more ECC code words of the data using an error-correcting code decoder and re-encoding the data using an error-correcting code encoder for storing the re-encoded data in the second set of non-volatile storage cells.

21. The apparatus of claim 19, further comprising an abort module configured to abort an in-process copyback procedure for the data in response to the copyback module determining not to store the data in the second set of non-volatile storage cells based on the one or more data factors.

22. The apparatus of claim 19, further comprising a read module configured to service read requests for the data from the first set of non-volatile storage cells prior to the data being erased from the first set of non-volatile storage cells and to service read requests from the second set of non-volatile storage cells after the data is erased from the first set of non-volatile storage cells.

23. The apparatus of claim 19, further comprising a read voltage module configured to determine one or more read voltage thresholds for the first set of non-volatile storage cells proactively based on one or more storage media characteristics for the first set of non-volatile storage cells, the copyback module configured to use the one or more read voltage thresholds to read the data from the first set of non-volatile storage cells for storing in the second set of non-volatile storage cells.

24. The apparatus of claim 19, wherein the power-cut module is configured to mark the second set of non-volatile storage cells as filled in response to the copyback module storing the data to the second set of non-volatile storage cells and to erase one or more sets of non-volatile storage cells not marked as filled after recovery from a power level failing to satisfy a threshold.

25. The apparatus of claim 19, further comprising a data factor module configured to maintain metadata indicating the one or more data factors over time based on at least one of a storage request for the data and a background scan of the data.

26. The apparatus of claim 19, wherein the first set of non-volatile storage cells and the second set of non-volatile storage cells are located in a same plane of an integrated circuit die.

27. A system comprising:

a non-volatile memory element comprising a set of single level cell (SLC) non-volatile memory cells and a set of triple level cell (TLC) non-volatile memory cells; and

a controller that;

selectively determines to copy data from the set of SLC non-volatile memory cells to the set of TLC non-volatile memory cells;

adjusts one or more read voltage thresholds for the set of SLC non-volatile memory cells based on one or more storage media characteristics for the set of SLC non-volatile memory cells for copying the data from the set of SLC non-volatile memory cells to the set of TLC non-volatile memory cells;

marks the set of TLC non-volatile storage cells as filled in response to storing the data to the set of TLC non-volatile storage cells; and

erases one or more sets of TLC non-volatile storage cells not marked as filled after recovery from a power level failing to satisfy a threshold.

28. The system of claim 27, wherein the controller determines the one or more read voltage thresholds for the set of SLC non-volatile memory cells proactively in an open-loop manner based on the one or more storage media characteristics for the set of SLC non-volatile memory cells.

29. The system of claim 27, wherein the controller services read requests for the data from the set of SLC non-volatile memory cells without using the adjusted one or more read voltage thresholds.