Method, system and program product for identifying anomalies in integrated circuit design layouts
First Claim
1. A method, comprising:
- providing a data representation of at least one integrated circuit design layout and one or more input parameters to a memory in communication with a processor;
deconstructing, by the processor according to instructions stored in the memory, the data representation into a plurality of unit-level geometric constructs;
identifying, by the processor according to instructions stored in the memory, anomalies in the plurality of unit-level geometric constructs, wherein the identifying is based on only the plurality of unit-level geometric constructs;
storing, by the processor according to instructions stored in the memory, anomaly data in a database, wherein the providing, the deconstructing, the identifying and the storing are performed prior to semiconductor manufacturing; and
using the anomaly data to perform semiconductor manufacturing, the using improving semiconductor manufacturing yield as compared to not using the anomaly data.
5 Assignments
0 Petitions
Accused Products
Abstract
Disclosed is a method and corresponding system and program product that includes providing integrated circuit design layout(s), deconstructing the integrated circuit design layout(s) into unit-level geometric constructs, identifying anomalies in the unit-level geometric constructs, and storing anomaly data in a database. The method further includes determining one or more feature attributes for each of the plurality of unit-level geometric constructs, annotating the unit-level geometric constructs with feature attributes, resulting in annotated unit-level geometric constructs, mapping the annotated unit-level geometric constructs in a hyperplane formed by one or more feature attributes, each of the one or more feature attributes forming a dimensional axis of the hyperplane, resulting in a mapped hyperplane, applying a first model to the mapped hyperplane, identifying the anomalies from applying the first model, and applying a second model to the mapped hyperplane to rank the anomalies for printability risk, the generated data including rank data.
8 Citations
20 Claims
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1. A method, comprising:
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providing a data representation of at least one integrated circuit design layout and one or more input parameters to a memory in communication with a processor; deconstructing, by the processor according to instructions stored in the memory, the data representation into a plurality of unit-level geometric constructs; identifying, by the processor according to instructions stored in the memory, anomalies in the plurality of unit-level geometric constructs, wherein the identifying is based on only the plurality of unit-level geometric constructs; storing, by the processor according to instructions stored in the memory, anomaly data in a database, wherein the providing, the deconstructing, the identifying and the storing are performed prior to semiconductor manufacturing; and using the anomaly data to perform semiconductor manufacturing, the using improving semiconductor manufacturing yield as compared to not using the anomaly data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A system, comprising:
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a memory; and at least one processor in communication with the memory, the memory storing instructions to perform a method, the method comprising; providing, by the at least one processor according to the instructions, a data representation of at least one integrated circuit design layout; deconstructing, by the at least one processor according to the instructions, the data representation into a plurality of unit-level geometric constructs; identifying, by the at least one processor according to the instructions, anomalies in the plurality of unit-level geometric constructs, wherein the identifying is based on only the plurality of unit-level geometric constructs; storing, by the at least one processor according to the instructions, anomaly data in a database, wherein the providing, the deconstructing, the identifying and the storing are performed prior to semiconductor manufacturing; and using the anomaly data to perform semiconductor manufacturing, the using improving semiconductor manufacturing yield as compared to not using the anomaly data. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A computer program product, comprising:
a non-transitory storage medium readable by a processor and storing instructions for execution by the processor for performing a method, the method comprising; providing a data representation of at least one integrated circuit design layout and one or more input parameters to a memory in communication with the processor; deconstructing, by the processor according to the instructions, the data representation into a plurality of unit-level geometric constructs; identifying, by the processor according to the instructions, anomalies in the plurality of unit-level geometric constructs, wherein the identifying is based on only the plurality of unit-level geometric constructs; storing, by the processor according to the instructions, anomaly data in a database, wherein the providing, the deconstructing, the identifying and the storing are performed prior to semiconductor manufacturing; and using the anomaly data to perform semiconductor manufacturing, the using improving semiconductor manufacturing yield as compared to not using the anomaly data. - View Dependent Claims (16, 17, 18, 19, 20)
Specification