Scheduling synchronization signals in a new carrier type

• US 10,057,855 B2
• Filed: 10/19/2015
• Issued: 08/21/2018
• Est. Priority Date: 05/11/2012
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Intel Corporation
• Inventors: Bashar, Shafi, Fwu, Jong-Kae, He, Hong
• Primary Examiner(s): Choudhry, Samina
• Assistant Examiner(s): Chen, Peter
• Application Number:
  US14/887,103
• Publication Number:
  US 20160044615A1
• Time in Patent Office: 1,037 Days
• Field of Search: None
• CPC Class Codes: H04B 1/56 with provision for simultaneous communication in two directions
• CPC Class Codes: H04B 15/00 Suppression or limitation of noise or interference by means associated with receiver H04B1/10
• CPC Class Codes: H04B 7/024 Co-operative use of antennas of several sites, e.g. in co-ordinated multipoint or co-operative multiple-input multiple-output [MIMO] systems
• CPC Class Codes: H04B 7/0417 Feedback systems
• CPC Class Codes: H04B 7/0456 Selection of precoding matrices or codebooks, e.g. using matrices antenna weighting
• CPC Class Codes: H04B 7/0473 taking constraints in layer or codeword to antenna mapping into account
• CPC Class Codes: H04B 7/0486 taking channel rank into account
• CPC Class Codes: H04B 7/0626 Channel coefficients, e.g. channel state information [CSI]
• CPC Class Codes: H04B 7/063 Parameters other than those covered in groups H04B7/0623 - H04B7/0634, e.g. channel matrix rank or transmit mode selection
• CPC Class Codes: H04B 7/0632 Channel quality parameters, e.g. channel quality indicator [CQI]
• CPC Class Codes: H04B 7/0639 Using selective indices, e.g. of a codebook, e.g. pre-distortion matrix index [PMI] or for beam selection
• CPC Class Codes: H04B 7/0647 Variable feedback rate
• CPC Class Codes: H04B 7/065 Variable contents, e.g. long-term or short-short
• CPC Class Codes: H04B 7/26 at least one of which is mobile
• CPC Class Codes: H04J 3/00 Time-division multiplex systems H04J14/00 takes precedence; relay systems H04B7/14; selecting techniques H04Q
• CPC Class Codes: H04J 3/1694 Allocation of channels in TDM/TDMA networks, e.g. distributed multiplexers Passive Optical Networks H04Q11/0062
• CPC Class Codes: H04J 3/26 in which the information and the address are simultaneously transmitted
• CPC Class Codes: H04L 1/0026 Transmission of channel quality indication
• CPC Class Codes: H04L 1/1803 Stop-and-wait protocols
• CPC Class Codes: H04L 1/1822 involving configuration of automatic repeat request [ARQ] with parallel processes
• CPC Class Codes: H04L 27/2627 : Modulators
• CPC Class Codes: H04L 5/0007 : the frequencies being orthogonal, e.g. OFDM(A), DMT
• CPC Class Codes: H04L 5/001 : the frequencies being arranged in component carriers
• CPC Class Codes: H04L 5/0035 : Resource allocation in a cooperative multipoint environment
• CPC Class Codes: H04L 5/0053 : Allocation of signaling, i.e. of overhead other than pilot signals
• CPC Class Codes: H04L 5/0073 : Allocation arrangements that take into account other cell interferences for intercell interference mitigation or co-ordination in orthogonal multiplex systems H04J11/005
• CPC Class Codes: H04L 5/0096 : Indication of changes in allocation
• CPC Class Codes: H04L 5/14 : Two-way operation using the same type of signal, i.e. duplex
• CPC Class Codes: H04L 5/1469 : using time-sharing
• CPC Class Codes: H04L 65/00 : Network arrangements, protocols or services for supporting real-time applications in data packet communication real-time or near real-time messaging, e.g. instant messaging [IM] H04L51/04; selective video distribution H04N21/00
• CPC Class Codes: H04L 69/22 : Parsing or analysis of headers
• CPC Class Codes: H04L 69/324 : in the data link layer [OSI layer 2], e.g. HDLC
• CPC Class Codes: H04W 16/14 : Spectrum sharing arrangements between different networks
• CPC Class Codes: H04W 24/02 : Arrangements for optimising operational condition
• CPC Class Codes: H04W 24/10 : Scheduling measurement reports ; Arrangements for measurement reports
• CPC Class Codes: H04W 36/0061 : of neighbour cell information
• CPC Class Codes: H04W 36/0088 : Scheduling hand-off measurements
• CPC Class Codes: H04W 36/0094 : Definition of hand-off measurement parameters
• CPC Class Codes: H04W 36/03 : Reselecting a link using a direct mode connection
• CPC Class Codes: H04W 36/04 : Reselecting a cell layer in multi-layered cells
• CPC Class Codes: H04W 36/16 : Performing reselection for specific purposes
• CPC Class Codes: H04W 36/18 : for allowing seamless reselection, e.g. soft reselection
• CPC Class Codes: H04W 36/22 : for handling the traffic
• CPC Class Codes: H04W 36/32 : by location or mobility data, e.g. speed data
• CPC Class Codes: H04W 4/02 : Services making use of location information
• CPC Class Codes: H04W 4/023 : using mutual or relative location information between multiple location based services [LBS] targets or of distance thresholds
• CPC Class Codes: H04W 4/029 : Location-based management or tracking services
• CPC Class Codes: H04W 4/06 : Selective distribution of broadcast services, e.g. multimedia broadcast multicast service [MBMS]; Services to user groups; One-way selective calling services
• CPC Class Codes: H04W 4/16 : Communication-related supplementary services, e.g. call-transfer or call-hold
• CPC Class Codes: H04W 4/70 : Services for machine-to-machine communication [M2M] or machine type communication [MTC]
• CPC Class Codes: H04W 4/90 : Services for handling of emergency or hazardous situations, e.g. earthquake and tsunami warning systems [ETWS]
• CPC Class Codes: H04W 48/20 : Selecting an access point
• CPC Class Codes: H04W 52/0209 : in terminal devices terminal devices per se H04W88/02
• CPC Class Codes: H04W 52/0212 : managed by the network, e.g. network or access point is master and terminal is slave
• CPC Class Codes: H04W 52/0216 : using a pre-established activity schedule, e.g. traffic indication frame
• CPC Class Codes: H04W 52/0225 : using monitoring of external events, e.g. the presence of a signal
• CPC Class Codes: H04W 52/0229 : where the received signal is a wanted signal
• CPC Class Codes: H04W 52/0235 : where the received signal is a power saving command
• CPC Class Codes: H04W 52/0251 : using monitoring of local events, e.g. events related to user activity
• CPC Class Codes: H04W 56/00 : Synchronisation arrangements
• CPC Class Codes: H04W 56/001 : Synchronization between nodes
• CPC Class Codes: H04W 72/02 : Selection of wireless resources by user or terminal
• CPC Class Codes: H04W 72/044 : based on the type of the allocated resource
• CPC Class Codes: H04W 72/12 : Wireless traffic scheduling
• CPC Class Codes: H04W 72/1215 : for collaboration of different radio technologies
• CPC Class Codes: H04W 72/21 : in the uplink direction of a wireless link, i.e. towards the network
• CPC Class Codes: H04W 72/23 : in the downlink direction of a wireless link, i.e. towards a terminal
• CPC Class Codes: H04W 72/27 : between access points
• CPC Class Codes: H04W 72/30 : Resource management for broadcast services
• CPC Class Codes: H04W 72/51 : based on terminal or device properties
• CPC Class Codes: H04W 72/54 : based on quality criteria
• CPC Class Codes: H04W 72/541 : using the level of interference
• CPC Class Codes: H04W 72/542 : using measured or perceived quality
• CPC Class Codes: H04W 72/56 : based on priority criteria
• CPC Class Codes: H04W 76/14 : Direct-mode setup
• CPC Class Codes: H04W 76/18 : Management of setup rejection or failure
• CPC Class Codes: H04W 76/27 : Transitions between radio resource control [RRC] states
• CPC Class Codes: H04W 76/28 : Discontinuous transmission [DTX]; Discontinuous reception [DRX]
• CPC Class Codes: H04W 88/02 : Terminal devices
• CPC Class Codes: H04W 88/06 : adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals
• CPC Class Codes: H04W 88/08 : Access point devices
• CPC Class Codes: Y02D 30/70 : in wireless communication networks

Abstract

Technology is discussed for supporting the incorporation of a Primary Synchronization Signal (PSS) and/or a Secondary Synchronization Signal (SSS) within in a New Carrier Type (NCT) for a Component Carrier (CC). Guidelines for incorporating the PSS and/or the SSS in the NCT are discovered, together with potential collisions with other signals that can be avoided for various scenarios. In some examples, various guidelines and potential collisions discovered herein, for various scenarios, inform approaches to incorporating the PSS and/or the SSS based on the positioning of the PSS and/or the SSS. In other examples, other signals, such as DeModulation Reference Symbols (DMRS) are reconfigured to allow incorporation of the PSS and the SSS.

Claims

1. An apparatus at an evolved Node B (eNodeB) for providing a Primary Synchronization Signal (PSS) and a Secondary Synchronization Signal (SSS) in a New Carrier Type (NCT) for Frequency Division Duplex (FDD) mode, the apparatus comprising:

one or more processors; and

a memory storing instructions to be executed by the one or more processors to;

schedule the PSS in time symbols of an Orthogonal Frequency Division Multiplexing (OFDM) radio frame, the time symbols located in a pair of slots, the pair of slots located in a pair of sub-frames separated by five milliseconds, the pair of sub-frames located within the OFDM radio frame of the NCT; and

schedule the SSS in time symbols in the OFDM radio frame, the time symbols located in a pair of slots, the pair of slots located in a pair of sub-frames separated by five milliseconds, the pair of sub-frames located within the OFDM radio frame pertaining to the NCT,

wherein demodulation reference signals (DMRS) are removed in time symbols of physical resource blocks (PRBs) within the OFDM radio frame of the NCT that are occupied by the PSS and the SSS to avoid collisions between the PSS and the SSS within the DMRS, and the eNodeB is configured to schedule slow moving user equipment (UEs) in the PRBs due to a reduced DMRS density in the PRBs within the OFDM radio frame of the NCT.

2. The apparatus of claim 1, wherein the one or more processors and memory are configured to schedule the PSS in time symbols comprising:

a first set of time symbols in a first pair of slots in a first pair of sub-frames for type I Physical Resource Blocks (PRBs) centered around a central frequency of a transmission bandwidth of the OFDM radio frame, and

a second set of time symbols in a second pair of slots in a second pair of sub-frames for remaining PRBs within the transmission bandwidth of the OFDM radio frame; and

the one or more processors and memory are configured to schedule the SSS in time symbols comprising;

a third set of time symbols in a third pair of slots in a third pair of sub-frames for the type I PRBs, and

a fourth set of time symbols in a fourth pair of slots in a fourth pair of sub-frames for the remaining PRBs within the transmission bandwidth.

3. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 1 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS by scheduling the SSS in time symbol 2 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal CP and an extended CP.

4. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 2 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS by scheduling the SSS in time symbol 1 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal CP and an extended CP.

5. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 1 of slot #1 of sub-frame #0 and sub-frame #5 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS by scheduling the SSS in time symbol 2 of slot #1 of sub-frame #0 and sub-frame #5 for one of a normal CP and an extended CP.

6. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 0 of slot #0 of sub-frame #4 and sub-frame #9 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS by scheduling the SSS in time symbol 1 of slot #0 of sub-frame #4 and sub-frame #9 for one of a normal CP and an extended CP.

7. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 0 of slot #0 of sub-frame #4 and sub-frame #9 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS by scheduling the SSS in time symbol 0 of slot #1 of sub-frame #4 and sub-frame #9 for one of a normal CP and an extended CP.

8. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 2 of slot #1 of sub-frame #0 and sub-frame #5 for a normal Cyclic Prefix (CP); and

schedule the SSS by scheduling the SSS in time symbol 3 of slot #1 of sub-frame #0 and sub-frame #5 of a normal CP.

9. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 0 of slot #1 of sub-frame #4 and sub-frame #9 for a normal Cyclic Prefix (CP); and

schedule the SSS by scheduling the SSS in time symbol 4 of slot #1 of sub-frame #4 and sub-frame #9 of a normal CP.

10. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 0 of slot #1 of sub-frame #4 and sub-frame #9 for an extended Cyclic Prefix (CP); and

schedule the SSS by scheduling the SSS in time symbol 3 of slot #1 of sub-frame #4 and sub-frame #9 of an extended CP.

11. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 0 of slot #0 of sub-frame #4 and sub-frame #9 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS by scheduling the SSS in time symbol 1 of slot #0 of sub-frame #4 and sub-frame #9 for one of a normal CP and an extended CP.

12. The apparatus of claim 1, wherein the one or more processors and memory are configured to:

schedule the PSS by scheduling the PSS in time symbol 1 of slot #0 of sub-frame #4 and sub-frame #9 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS by scheduling the SSS in symbol 0 of slot #0 of sub-frame #4 and sub-frame #9 for one of a normal CP and an extended CP.

13. An evolved Node B (eNodeB) configured to provide a Primary Synchronization Signal (PSS) and a Secondary Synchronization Signal (SSS) in a New Carrier Type (NCT) for Time Division Duplex (TDD) mode, including:

one or more processors; and

a memory storing instructions to be executed by the one or more processors to;

schedule the PSS in time symbols of an Orthogonal Frequency Division Multiplexing (OFDM) radio frame, the time symbols located in a pair of slots, the pair of slots located in a pair of sub-frames separated by five milliseconds, the pair of sub-frames located within the OFDM radio frame of the NCT; and

schedule the SSS in time symbols in the OFDM radio frame, the time symbols located in a pair of slots, the pair of slots located in a pair of sub-frames separated by five milliseconds, the pair of sub-frames located within the OFDM radio frame pertaining to the NCT,

wherein demodulation reference signals (DMRS) are removed in time symbols of physical resource blocks (PRBs) within the OFDM radio frame of the NCT that are occupied by the PSS and the SSS to avoid collisions between the PSS and the SSS within the DMRS, and the eNodeB is configured to schedule slow moving user equipment (UEs) in the PRBs due to a reduced DMRS density in the PRBs within the OFDM radio frame of the NCT.

14. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in the time symbols is further configured to schedule the PSS in time symbol 0 of slot #0 of sub-frame #1 and sub-frame #6 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS in the time symbols is further configured to schedule the SSS in time symbol 1 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal CP and an extended CP.

15. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in the time symbols is further configured to schedule the PSS in time symbol 0 of slot #0 of sub-frame #1 and sub-frame #6 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS in the time symbols is further configured to schedule the SSS in time symbol 2 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal CP and an extended CP.

16. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in the time symbols is further configured to schedule the PSS in time symbol 1 of slot #0 of sub-frame #1 and sub-frame #6 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS in the time symbols is further configured to schedule the SSS in time symbol 1 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal CP and an extended CP.

17. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in the time symbols is further configured to schedule the PSS in time symbol 1 of slot #0 of sub-frame #1 and sub-frame #6 for one of a normal Cyclic Prefix (CP) and an extended CP; and

schedule the SSS in the time symbols is further configured to schedule the SSS in time symbol 2 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal CP and an extended CP.

18. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in time symbols is further configured to schedule the PSS for one of a normal Cyclic Prefix (CP) and an extended CP in time symbol 1 of slot #0 of sub-frame #0 and sub-frame #5; and

schedule the SSS in time symbols is further configured to schedule the SSS for one of a normal CP and an extended CP in time symbol 2 of slot #0 of sub-frame #0 and sub-frame #5 for the first case.

19. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in time symbols is further configured to schedule the PSS for one of a normal Cyclic Prefix (CP) and an extended CP in time symbol 1 of slot #1 of sub-frame #0 and sub-frame #5; and

schedule the SSS in time symbols is further configured to schedule the SSS for one of a normal CP and an extended CP in time symbol 3 of slot #1 of sub-frame #0 and sub-frame #5.

20. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in time symbols is further configured to schedule the PSS for one of a normal Cyclic Prefix (CP) and an extended CP in time symbol 2 of slot #0 of sub-frame #0 and sub-frame #5; and

schedule the SSS in time symbols is further configured to schedule the SSS for one of a normal CP and an extended CP;

in time symbol 1 of slot #0 of sub-frame #0 and sub-frame #5.

21. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in the time symbols is further configured to schedule the PSS in time symbol 0 of slot #1 of sub-frame #1 and sub-frame #6 for a normal Cyclic Prefix (CP); and

schedule the SSS in the time symbols is further configured to schedule the SSS in time symbol 1 of slot #1 of sub-frame #1 and sub-frame #6 for a normal CP.

22. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in time symbols is further configured to schedule the PSS for an extended Cyclic Prefix (CP) in time symbol 2 of slot #0 of sub-frame #1 and sub-frame #6, and

schedule the SSS in time symbols is further configured to schedule the SSS for an extended CP;

in one of;

symbol 1 of slot #0 of sub-frame #0 and sub-frame #5, and

symbol 2 of slot #0 of sub-frame #0 and sub-frame #5.

23. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in time symbols is further configured to schedule the PSS for one of a normal Cyclic Prefix (CP) and an extended CP in time symbol 2 of slot #0 of sub-frame #1 and sub-frame #6, and

schedule the SSS in time symbols is further configured to schedule the SSS for one of a normal CP and an extended CP;

in one of;

symbol 0 of slot #0 of sub-frame #1 and sub-frame #6, and

symbol 1 of slot #0 of sub-frame #1 and sub-frame #6.

24. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in time symbols is further configured to schedule the PSS for one of a normal Cyclic Prefix (CP) and an extended CP in time symbol 1 of slot #0 of sub-frame #1 and sub-frame #6, and

schedule the SSS in time symbols is further configured to schedule the SSS for one of a normal CP and an extended CP;

in symbol 2 of slot #0 of sub-frame #1 and sub-frame #6.

25. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in time symbols is further configured to schedule the PSS for an extended Cyclic Prefix (CP) in symbol 1 of slot #0 of sub-frame #1 and sub-frame #6; and

schedule the SSS in time symbols is further configured to schedule the SSS for an extended CP in symbol 0 of slot #0 of sub-frame #1 and sub-frame #6.

26. The eNodeB of claim 13, wherein the one or more processors and memory are further configured to:

schedule the PSS in time symbols is further configured to schedule the PSS for an extended Cyclic Prefix (CP) in

symbol 1 of slot #0 of sub-frame #1 and sub-frame #5; and

schedule the SSS in time symbols is further configured to schedule the SSS for an extended CP in

symbol 2 of slot #0 of sub-frame #1 and sub-frame #5.

27. A non-transitory computer-readable storage medium containing instructions thereon which, when executed by one or more processors, perform the following:

scheduling a Primary Synchronization Signal (PSS) in time symbols of an Orthogonal Frequency Division Multiplexing (OFDM) radio frame, the time symbols located in a pair of slots, the pair of slots located in a pair of sub-frames separated by five milliseconds, the pair of sub-frames located within the OFDM radio frame of a New Carrier Type (NCT); and

scheduling a Secondary Synchronization Signal (SSS) in time symbols in the OFDM radio frame, the time symbols located in a pair of slots, the pair of slots located in a pair of sub-frames separated by five milliseconds, the pair of sub-frames located within the OFDM radio frame pertaining to the NCT,

wherein demodulation reference signals (DMRS) are removed in time symbols of physical resource blocks (PRBs) within the OFDM radio frame of the NCT that are occupied by the PSS and the SSS to avoid collisions between the PSS and the SSS with the DMRS, and an eNodeB is configured to schedule slow moving user equipment (UEs) in the PRBs due to a reduced DMRS density in the PRBs within the OFDM radio frame of the NCT.

28. The non-transitory computer-readable storage medium of claim 27, further containing instructions thereon which, when executed by one or more processors, perform the following:

scheduling the PSS in time symbols comprising;

a first set of time symbols in a first pair of slots in a first pair of sub-frames for type I Physical Resource Blocks (PRBs) centered around a central frequency of a transmission bandwidth of the OFDM radio frame, and

a second set of time symbols in a second pair of slots in a second pair of sub-frames for remaining PRBs within the transmission bandwidth of the OFDM radio frame; and

scheduling the SSS in time symbols comprising;

a third set of time symbols in a third pair of slots in a third pair of sub-frames for the type I PRBs, and

a fourth set of time symbols in a fourth pair of slots in a fourth pair of sub-frames for the remaining PRBs within the transmission bandwidth.

29. The non-transitory computer-readable storage medium of claim 27, further containing instructions thereon which, when executed by one or more processors, perform the following:

scheduling the PSS by scheduling the PSS in time symbol 1 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal Cyclic Prefix (CP) and an extended CP; and

scheduling the SSS by scheduling the SSS in time symbol 2 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal CP and an extended CP.

30. The non-transitory computer-readable storage medium of claim 27, further containing instructions thereon which, when executed by one or more processors, perform the following:

scheduling the PSS by scheduling the PSS in time symbol 2 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal Cyclic Prefix (CP) and an extended CP; and

scheduling the SSS by scheduling the SSS in time symbol 1 of slot #0 of sub-frame #0 and sub-frame #5 for one of a normal CP and an extended CP.