Ephemeral peripheral device

• US 10,061,738 B2
• Filed: 04/28/2016
• Issued: 08/28/2018
• Est. Priority Date: 09/30/2014
• Status: Active Grant

• Current Assignee: Jonker LLC
• Original Assignee: Jonker LLC
• Inventors: Gross, John Nicholas, Liu, David K.Y.
• Primary Examiner(s): King, Douglas
• Application Number:
  US15/141,320
• Publication Number:
  US 20160239457A1
• Time in Patent Office: 852 Days
• Field of Search: None
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: G06F 3/0622 in relation to access
• CPC Class Codes: G06F 3/065 Replication mechanisms
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 13/004 Reading or sensing circuits or methods
• CPC Class Codes: G11C 13/0059 Security or protection circuits or methods
• CPC Class Codes: G11C 16/14 Circuits for erasing electrically, e.g. erase voltage switching circuits
• CPC Class Codes: G11C 16/22 Safety or protection circuits preventing unauthorised or accidental access to memory cells
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 17/18 Auxiliary circuits, e.g. for writing into memory
• CPC Class Codes: G11C 7/24 Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
• CPC Class Codes: H04W 88/02 Terminal devices

Abstract

An ephemeral system includes an ephemeral communications device and associated ephemeral memory system (onboard or peripheral) for securing user data. Different secure operating modes are provided for customizing user security requirements across end-to-end communications links, including in exchanges of electronic data between smartphone devices.

Claims

1. An ephemeral non-volatile charge-storage memory device adapted to be coupled to and store selected data from one or more applications executing on a first separate host computing device comprising:

an interface circuit adapted to exchange ephemerally designated data between the ephemeral non-volatile charge-storage memory device and the first separate host computing device;

an ephemeral non-volatile charge-storage memory circuit adapted to store said ephemerally designated data;

a controller circuit coupled to said interface circuit and said ephemeral non-volatile charge-storage memory device, and being adapted to process and enforce ephemeral parameters for data specified by the one or more applications on the first separate host computing device, said ephemeral parameters including instructions specifying a one time access read operation on ephemerally designated data for the one or more applications;

wherein said one time access read operation performed by said controller circuit is implemented through a single hybrid memory operation that simultaneously both reads and alters an amount of electrical charge present on said non-volatile charge-storage memory devices so as to physically and permanently erase said ephemerally designated data on said ephemeral non-volatile charge-storage based memory circuit;

wherein the ephemeral non-volatile charge-storage memory device comprises a floating gate configured to store electrical charge and is configured to impart ephemeral behavior to selected data received by a first separate host computing device.

2. The device of claim 1, wherein the ephemeral parameters include an instruction to automatically erase the ephemerally designated data after a predetermined period of time.

3. The device of claim 1, wherein the ephemeral parameters include an instruction to automatically erase the ephemerally designated data in response to detecting an attempted access by a device other than the first separate host computing device.

4. The device of claim 1 further including a wireless communications circuit adapted to act as a proxy and directly receive wireless ephemerally designated data from a second computing device through an ephemeral wireless communications channel that is separate from a wireless communications channel used by the first separate host computing device.

5. The device of claim 1 further including a tethering routine executing on the ephemeral charge-storage memory device which tethers it to the first separate host computing device.

6. The device of claim 5 wherein said tethering routine stores a unique identifying key or code from the first separate host computing device in a secure one-time-programmable memory.

7. The device of claim 1 further including an application routine adapted to execute on the first separate host computing device and permit user customization of said ephemeral parameters.

8. The device of claim 1 wherein said first separate host computing device is a first smartphone and the ephemeral non-volatile charge-storage memory device is connectable through a micro USB interface to implement an end to end secure communications channel between the first smartphone and a second smartphone transmitting said selected data, such that none of the selected data are stored in any non-ephemeral non-volatile memory of the first smartphone.

9. The device of claim 1 wherein said one time access read operation performed by said controller circuit is implemented through a destructive read operation which biases said non-volatile charge-storage memory devices to add electron charge through a channel hot injection process.

10. The method of claim 1 wherein a threshold voltage Vt of each memory cell in a memory array of the ephemeral non-volatile charge-storage memory device is restored to an unprogrammed level after each read of the contents of such cell.

11. The method of claim 1 wherein said single hybrid memory operation includes a phase in which a positive bias voltage is applied to a control gate of memory cells in a memory array of the ephemeral non-volatile charge-storage memory device causing electrons to flow to the floating gate of such memory cells.

12. The method of claim 1 wherein said single hybrid memory operation senses a state of memory cells in said ephemeral non-volatile charge-storage memory devices by integrating a total amount of charge flowing through such cells during the entire single hybrid memory operation.

13. The method of claim 1 wherein said single hybrid memory operation senses a state of memory cells in said ephemeral non-volatile charge-storage memory devices by detecting a total change in drain current as a function of time flowing through such cells during the single hybrid memory operation.

14. An ephemeral non-volatile charge-storage memory system adapted to temporarily store ephemerally designated data comprising:

an ephemeral memory routine adapted to execute on a first host computing device and process ephemerally designated data received at such device; and

an ephemeral non-volatile charge-storage memory device comprising a floating gate configured to store electrical charge and adapted to be coupled to the first host computing device, and further including;

i) an interface circuit adapted to exchange ephemerally designated data between the ephemeral non-volatile charge-storage memory device and the first separate host computing device;

ii) an ephemeral non-volatile memory circuit adapted to store said ephemerally designated data;

iii) a controller circuit coupled to said interface circuit and said ephemeral non-volatile charge-storage memory, and being adapted to perform a write operation and a read operation on said ephemerally designated data;

wherein said read operation performed by said controller circuit is implemented through a single hybrid memory operation that simultaneously both reads and alters an amount of electrical charge present on said non-volatile charge-storage memory devices so as to physically and permanently erase said ephemerally designated data on said ephemeral non-volatile charge-storage memory circuit.

15. The system of claim 14 wherein said ephemeral memory routine has multiple ephemeral parameters configurable by a user of such first host computing device, including different ephemeral modes, each defining an ephemeral treatment to be enforced at the first host computing device for any ephemerally designated data.

16. The system of claim 15 wherein enabling a first ephemeral mode causes any data received by the first host computing device to be stored in said ephemeral non-volatile charge-storage memory circuit.

17. The system of claim 15 wherein enabling a first ephemeral mode causes any data file received by said ephemeral memory routine to only be stored in non-volatile form in said ephemeral non-volatile charge-storage memory circuit and only portions of said data file are stored in a transitory memory of the first separate host computing device.

18. The system of claim 15 wherein enabling a first ephemeral mode causes data communicated by a second host computing device during a data session to the first separate host computing device to be received directly by said ephemeral non-volatile charge-storage memory device and/or an ephemeral charge-storage memory onboard said first separate host computing device.

19. The system of claim 15 wherein said hybrid memory operation includes one of a destructive read which biases said charge-storage memory devices to add electron charge through a channel hot injection process.