Semiconductor device and method for manufacturing the same

• US 10,062,570 B2
• Filed: 09/09/2014
• Issued: 08/28/2018
• Est. Priority Date: 06/30/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Sasaki, Toshinari, Sakata, Junichiro, Ohara, Hiroki, Yamazaki, Shunpei
• Primary Examiner(s): Maldonado, Julio J
• Assistant Examiner(s): Newton, Valerie N
• Application Number:
  US14/480,760
• Publication Number:
  US 20140377907A1
• Time in Patent Office: 1,449 Days
• Field of Search: None
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a high reliable semiconductor device including a thin film transistor having stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (which is for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. Besides impurities such as moisture existing in the oxide semiconductor film, heat treatment causes reduction of impurities such as moisture existing in the gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor film and are in contact with the oxide semiconductor film.

Claims

1. A method for manufacturing a semiconductor device comprising the steps of:

forming an oxide semiconductor layer over an insulating layer;

heating the oxide semiconductor layer under an atmosphere comprising nitrogen at a temperature equal to or higher than 400°

C. to increase a carrier concentration in the oxide semiconductor layer;

after heating the oxide semiconductor layer, forming an oxide insulating layer over and in contact with a part of the oxide semiconductor layer; and

after forming the oxide insulating layer, heating the oxide insulating layer to reduce the carrier concentration in the oxide semiconductor layer.

2. The method for manufacturing a semiconductor device according to claim 1, further comprising the step of forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer before forming the oxide insulating layer.

3. The method for manufacturing a semiconductor device according to claim 2, wherein the source electrode layer and the drain electrode layer comprise a material selected from titanium and molybdenum.

4. The method for manufacturing a semiconductor device according to claim 1, wherein heating the oxide insulating layer is performed under an atmosphere comprising nitrogen.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises a crystal.

6. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium and zinc.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises a material selected from the group consisting of In—

Sn—

Zn—

O-based oxide semiconductor;

an In—

Al—

Zn—

O-based oxide semiconductor;

a Sn—

Ga—

Zn—

O-based oxide semiconductor;

an Al—

Ga—

Zn—

O-based oxide semiconductor;

a Sn—

Al—

Zn—

O-based oxide semiconductor;

an In—

Zn—

O-based oxide semiconductor;

an In—

Ga—

O-based oxide semiconductor;

a Sn—

Zn—

O-based oxide semiconductor;

an Al—

Zn—

O-based oxide semiconductor;

an In—

O-based oxide semiconductor;

a Sn—

O-based oxide semiconductor; and

a Zn—

O-based oxide semiconductor.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an intrinsic oxide semiconductor after heating the oxide insulating layer.

9. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an oxide semiconductor in an oxygen-excess state after heating the oxide insulating layer.

10. A method for manufacturing a semiconductor device comprising the steps of:

forming a first conductive layer;

forming an oxide semiconductor layer over the conductive layer;

heating the oxide semiconductor layer under an atmosphere comprising nitrogen at a temperature equal to or higher than 400°

C. to increase a carrier concentration in the oxide semiconductor layer;

after heating the oxide semiconductor layer, forming an oxide insulating layer over and in contact with a part of the oxide semiconductor layer;

after forming the oxide insulating layer, heating the oxide insulating layer to reduce the carrier concentration in the oxide semiconductor layer; and

forming a second conductive layer over the oxide insulating layer,

wherein the second conductive layer overlaps the first conductive layer and the oxide semiconductor layer.

11. The method for manufacturing a semiconductor device according to claim 10, further comprising the step of forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer before forming the oxide insulating layer.

12. The method for manufacturing a semiconductor device according to claim 11, wherein the source electrode layer and the drain electrode layer comprise a material selected from titanium and molybdenum.

13. The method for manufacturing a semiconductor device according to claim 10, wherein heating the oxide insulating layer is performed under an atmosphere comprising nitrogen.

14. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises a crystal.

15. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises indium and zinc.

16. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises a material selected from the group consisting of In—

Sn—

Zn—

O-based oxide semiconductor;

an In—

Al—

Zn—

O-based oxide semiconductor;

a Sn—

Ga—

Zn—

O-based oxide semiconductor;

an Al—

Ga—

Zn—

O-based oxide semiconductor;

a Sn—

Al—

Zn—

O-based oxide semiconductor;

an In—

Zn—

O-based oxide semiconductor;

an In—

Ga—

O-based oxide semiconductor;

a Sn—

Zn—

O-based oxide semiconductor;

an Al—

Zn—

O-based oxide semiconductor;

an In—

O-based oxide semiconductor;

a Sn—

O-based oxide semiconductor; and

a Zn—

O-based oxide semiconductor.

17. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises an intrinsic oxide semiconductor after heating the oxide insulating layer.

18. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises an oxide semiconductor in an oxygen-excess state after heating the oxide insulating layer.

19. The method for manufacturing a semiconductor device according to claim 10, wherein the first conductive layer and the second conductive layer are electrically connected to each other.

20. A method for manufacturing a semiconductor device comprising the steps of:

forming an oxide semiconductor layer;

performing a first heat treatment on the oxide semiconductor layer under an atmosphere comprising nitrogen at a temperature not lower than 300°

C. to reduce oxygen in the oxide semiconductor layer;

forming an oxide insulating layer over and in contact with a region in the oxide semiconductor layer; and

performing a second heat treatment on the oxide insulating layer under an atmosphere comprising nitrogen to increase oxygen in the oxide semiconductor layer.

21. The method for manufacturing a semiconductor device according to claim 20, further comprising the step of forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer before forming the oxide insulating layer.

22. The method for manufacturing a semiconductor device according to claim 21, wherein the source electrode layer and the drain electrode layer comprise a material selected from titanium and molybdenum.

23. The method for manufacturing a semiconductor device according to claim 20, wherein the oxide semiconductor layer comprises a crystal.

24. The method for manufacturing a semiconductor device according to claim 20, wherein the oxide semiconductor layer comprises indium and zinc.

25. The method for manufacturing a semiconductor device according to claim 20, wherein the oxide semiconductor layer comprises a material selected from the group consisting of In—

Sn—

Zn—

O-based oxide semiconductor;

an In—

Al—

Zn—

O-based oxide semiconductor;

a Sn—

Ga—

Zn—

O-based oxide semiconductor;

an Al—

Ga—

Zn—

O-based oxide semiconductor;

a Sn—

AI—

Zn—

O-based oxide semiconductor;

an In—

Zn—

O-based oxide semiconductor;

an In—

Ga—

O-based oxide semiconductor;

a Sn—

Zn—

O-based oxide semiconductor;

an Al—

Zn—

O-based oxide semiconductor;

an In—

O-based oxide semiconductor;

a Sn—

O-based oxide semiconductor; and

a Zn—

O-based oxide semiconductor.

26. The method for manufacturing a semiconductor device according to claim 20, wherein the oxide semiconductor layer comprises an intrinsic oxide semiconductor after heating the oxide insulating layer.

27. The method for manufacturing a semiconductor device according to claim 20, wherein the oxide semiconductor layer comprises an oxide semiconductor in an oxygen-excess state after heating the oxide insulating layer.