Poly directional etch by oxidation

• US 10,062,575 B2
• Filed: 09/09/2016
• Issued: 08/28/2018
• Est. Priority Date: 09/09/2016
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Choi, Tom, Ko, Jungmin, Kang, Sean
• Primary Examiner(s): OLSEN, ALLAN W
• Application Number:
  US15/260,755
• Publication Number:
  US 20180076044A1
• Time in Patent Office: 718 Days
• Field of Search: None
• CPC Class Codes: H01L 21/02323 introduction of oxygen
• CPC Class Codes: H01L 21/02326 into a nitride layer, e.g. changing SiN to SiON
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/32105 Oxidation of silicon-containing layers
• CPC Class Codes: H01L 21/32137 of silicon-containing layers

Abstract

Processing methods may be performed to form recesses in a semiconductor substrate. The methods may include oxidizing an exposed silicon surface on a semiconductor substrate within a processing region of a semiconductor processing chamber. The methods may include forming an inert plasma within the processing region of the processing chamber. Effluents of the inert plasma may be utilized to modify the oxidized silicon. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified oxidized silicon from the semiconductor substrate.

Claims

1. An etching method comprising:

oxidizing an exposed silicon surface on a semiconductor substrate within a processing region of a semiconductor processing chamber;

forming an inert plasma within the processing region of the semiconductor processing chamber;

modifying at least part of the oxidized silicon with effluents of the inert plasma;

forming a remote plasma from a fluorine-containing precursor to produce plasma effluents;

flowing the plasma effluents to the processing region of the semiconductor processing chamber; and

removing the modified oxidized silicon from the semiconductor substrate.

2. The etching method of claim 1, wherein the inert plasma comprises a helium plasma.

3. The etching method of claim 1, wherein the inert plasma is formed from a bias power below about 100 W.

4. The etching method of claim 1, wherein the surface of the exposed silicon on the semiconductor substrate is modified to a depth from the exposed surface within the semiconductor substrate of less than about 4 nm.

5. The etching method of claim 1, wherein a pressure within the semiconductor processing chamber while forming the inert plasma and during the modifying is maintained below about 50 mTorr.

6. The etching method of claim 1, wherein the remote plasma is formed in a region of the semiconductor processing chamber physically separated from the processing region of the semiconductor processing chamber or is formed in a remote plasma unit fluidly coupled with the semiconductor processing chamber.

7. The etching method of claim 1, wherein the semiconductor substrate is maintained at a temperature above or about 80°

C. during the removal of the modified oxidized silicon.

8. The etching method of claim 7, wherein removing the modified oxidized silicon exposes an unmodified portion of oxidized silicon, and wherein an etching selectivity of a modified portion of the oxidized silicon to the unmodified portion of the oxidized silicon is greater than or about 100:

1.

9. The etching method of claim 1, wherein the oxidizing comprises:

forming an oxygen-based plasma within the processing region of the semiconductor processing chamber; and

contacting the exposed silicon surface with plasma effluents of the oxygen-based plasma.

10. The etching method of claim 1, wherein the remote plasma is additionally formed from a hydrogen-containing precursor.

11. The etching method of claim 1, wherein each operation of the etching method is repeated in at least one additional cycle, and wherein a total depth of removal after all cycles is more than 30 nm of silicon.

12. An etching method comprising:

oxidizing an exposed silicon surface on a semiconductor substrate within a processing region of a semiconductor processing chamber to produce a region of silicon oxide;

forming an inert plasma within a processing region of a semiconductor processing chamber;

modifying at least a portion of the region of silicon oxide with effluents of the inert plasma;

contacting the modified silicon oxide with plasma effluents of a fluorine-containing precursor; and

etching the modified silicon oxide, wherein the oxidizing, modifying, contacting, and etching are all performed in the semiconductor processing chamber.

13. The etching method of claim 12, wherein the etching is performed at a temperature of about 100°

C.

14. The etching method of claim 12, wherein the plasma effluents of the fluorine-containing precursor are formed in a remote region of the semiconductor processing chamber fluidly coupled with, and physically separated from, the processing region of the semiconductor processing chamber.

15. The etching method of claim 14, wherein the plasma effluents of the fluorine-containing precursor are produced by a capacitively-coupled plasma at a power level of about 300 W.

16. The etching method of claim 14, wherein the modified silicon oxide is additionally contacted with a hydrogen-containing precursor.

17. The etching method of claim 16, wherein the hydrogen-containing precursor bypasses the remote region of the semiconductor processing chamber, and wherein the hydrogen-containing precursor interacts with the plasma effluents of the fluorine-containing precursor subsequent to the plasma effluents of the fluorine-containing precursor exiting the remote region of the semiconductor processing chamber.

18. An etching method comprising:

forming an oxygen-containing plasma within a processing region of a semiconductor processing chamber;

oxidizing an exposed silicon-containing surface on a semiconductor substrate within the processing region of the semiconductor processing chamber to form a region of silicon oxide at least 3 nm in depth from the silicon-containing surface;

forming an inert plasma within the processing region of the semiconductor processing chamber, wherein the inert plasma comprises a helium plasma formed by a bias power of less than 100 W;

modifying at least a portion of the oxidized silicon-containing surface with effluents of the inert plasma, wherein a pressure within the semiconductor processing chamber is maintained below about 50 mTorr during the modifying;

forming a plasma of a fluorine-containing precursor in a remote region of the semiconductor processing chamber that is separated from the processing region of the semiconductor processing chamber by a showerhead;

contacting the modified, oxidized silicon-containing surface with plasma effluents of the fluorine-containing precursor; and

etching the modified, oxidized silicon-containing surface at a temperature of about 100°

C., wherein the oxidizing, modifying, contacting, and etching are all performed in the semiconductor processing chamber, and wherein no solid byproducts are produced during the etching.

19. The etching method of claim 18, wherein the remote region of the semiconductor processing chamber is a region defined within the semiconductor processing chamber.

20. The etching method of claim 18, wherein the remote region of the semiconductor processing chamber is a region external to the semiconductor processing chamber, but fluidly coupled with an inlet to the semiconductor processing chamber.