Oxygen compatible plasma source
First Claim
1. A semiconductor processing chamber comprising:
- a chamber housing at least partially defining an interior region of the semiconductor processing chamber, wherein the chamber housing comprises a lid;
a pedestal configured to support a substrate within a processing region of the semiconductor processing chamber;
a first showerhead coupled with an electrical source, wherein the first showerhead is positioned within the semiconductor processing chamber between the lid and the processing region;
a first dielectric faceplate positioned within the semiconductor processing chamber between the first showerhead and the processing region;
a second showerhead coupled with electrical ground and positioned within the semiconductor processing chamber between the first dielectric faceplate and the processing region; and
a second dielectric faceplate positioned within the semiconductor processing chamber between the first dielectric faceplate and the second showerhead.
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Accused Products
Abstract
Described processing chambers may include a chamber housing at least partially defining an interior region of a semiconductor processing chamber. The chamber housing may include a lid. The chamber may include a pedestal configured to support a substrate within a processing region of the chamber. The chamber may also include a first showerhead coupled with an electrical source. The first showerhead may be positioned within the semiconductor processing chamber between the lid and the processing region. The chamber may also include a first dielectric faceplate positioned within the semiconductor processing chamber between the first showerhead and the processing region. The chamber may include a second showerhead coupled with electrical ground and positioned within the semiconductor processing chamber between the first dielectric faceplate and the processing region. The chamber may further include a second dielectric faceplate positioned within the semiconductor processing chamber between the first dielectric faceplate and the second showerhead.
1783 Citations
15 Claims
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1. A semiconductor processing chamber comprising:
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a chamber housing at least partially defining an interior region of the semiconductor processing chamber, wherein the chamber housing comprises a lid; a pedestal configured to support a substrate within a processing region of the semiconductor processing chamber; a first showerhead coupled with an electrical source, wherein the first showerhead is positioned within the semiconductor processing chamber between the lid and the processing region; a first dielectric faceplate positioned within the semiconductor processing chamber between the first showerhead and the processing region; a second showerhead coupled with electrical ground and positioned within the semiconductor processing chamber between the first dielectric faceplate and the processing region; and a second dielectric faceplate positioned within the semiconductor processing chamber between the first dielectric faceplate and the second showerhead. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A semiconductor processing chamber comprising:
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a chamber housing at least partially defining an interior region of the semiconductor processing chamber, wherein the chamber housing comprises a lid; a pedestal configured to support a substrate within a processing region of the semiconductor processing chamber; a first showerhead coupled with an electrical source, wherein the first showerhead is positioned within the semiconductor processing chamber between the lid and the processing region, and wherein the first showerhead comprises a metal oxide; a first quartz faceplate positioned within the semiconductor processing chamber between the first showerhead and the processing region; a second showerhead coupled with electrical ground and positioned within the semiconductor processing chamber between the first dielectric faceplate and the processing region, and wherein the first showerhead comprises a metal oxide; a second quartz faceplate positioned within the semiconductor processing chamber between the first dielectric faceplate and the second showerhead; and a dielectric spacer positioned between and contacting each of the first quartz faceplate and the second quartz faceplate.
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Specification