Methods and systems for making piezoelectric cantilever actuators

• US 10,062,832 B2
• Filed: 10/26/2016
• Issued: 08/28/2018
• Est. Priority Date: 11/30/2015
• Status: Active Grant

• Current Assignee: SABIC Global Technologies BV (Government of Saudi Arabia)
• Original Assignee: SABIC Global Technologies BV (Government of Saudi Arabia)
• Inventors: Caraveo, Jesus Alfonso, Al-Howaish, Ibrahim, Almadhoun, Mahmoud N., Aldubayan, Abdulaziz Hamad M.
• Primary Examiner(s): Picardat, Kevin M
• Application Number:
  US15/334,759
• Publication Number:
  US 20170155038A1
• Time in Patent Office: 671 Days
• Field of Search: 438 52, 257415, 257417
• CPC Class Codes: B81C 1/0015 Cantilevers switches using MEMS H01H1/0036; electrostatic relays using micromechanics H01H59/0009; microelectro-mechanical resonators H03H9/02244
• CPC Class Codes: H10N 30/01 Manufacture or treatment
• CPC Class Codes: H10N 30/06 Forming electrodes or interconnections, e.g. leads or terminals
• CPC Class Codes: H10N 30/074 by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
• CPC Class Codes: H10N 30/084 by moulding or extrusion
• CPC Class Codes: H10N 30/2042 Cantilevers, i.e. having one fixed end
• CPC Class Codes: H10N 30/306 Cantilevers
• CPC Class Codes: H10N 39/00 Integrated devices, or assemblies of multiple devices, comprising at least one piezoelectric, electrostrictive or magnetostrictive element covered by groups H10N30/00 – H10N35/00

Abstract

A method of fabricating a microelectronic device comprising providing a substrate comprising a first bottom surface, providing a mold comprising a first top surface with first projections, and punching the first projections through the first bottom surface to define anchors, pre-cantilevers, and cavities in the substrate. A piezoelectric cantilever actuator system array prepared by a process comprising the steps of providing a substrate comprising a first bottom surface, providing a mold comprising a first top surface with first projections, and punching the first projections through the first bottom surface to define anchors, pre-cantilevers, and cavities in the substrate. A microelectronic device comprising a base, a first anchor coupled to the base, and a first cantilever coupled to the first anchor, wherein the base, the first anchor, and the first cantilever are an integral structure formed from the same substrate material.

Claims

1. A method of fabricating a microelectronic device comprising:

providing a substrate comprising a first bottom surface;

providing a mold comprising a first top surface with first projections;

punching the first projections through the first bottom surface to define anchors, pre-cantilevers, and cavities in the substrate;

providing a cutter with a second bottom surface with second projections; and

stamping a second top surface of the substrate to release the pre-cantilevers and define cantilevers and recess areas.

2. A method of fabricating a microelectronic device comprising:

providing a substrate comprising a first bottom surface;

providing a mold comprising a first top surface with first projections;

punching the first projections through the first bottom surface to define anchors, pre-cantilevers, and cavities in the substrate;

fabricating additional circuitry on top of the pre-cantilevers after the providing the substrate, the providing the mold, and the punching;

depositing a bottom electrode layer; and

patterning the bottom electrode layer to define bottom contact pads and bottom electrodes corresponding to the pre-cantilevers.

3. The method of claim 2, wherein the fabricating further comprises depositing gate dielectric layers.

4. The method of claim 3, wherein the fabricating further comprises depositing a piezoelectric layer on top of the bottom contact pads, the bottom electrodes, and the gate dielectric layers for thin-film transistors (TFTs).

5. The method of claim 4, wherein the fabricating further comprises:

depositing a semiconductor layer on top of the piezoelectric layer; and

patterning the semiconductor layer to define TFT semiconductor layers for the TFTs.

6. The method of claim 5, wherein the fabricating further comprises:

depositing a top electrode layer; and

patterning the top electrode layer to define top electrodes, connectors, source electrodes for the TFTs, drain electrodes for the TFTs, and top contact pads.

7. The method of claim 6, wherein the fabricating further comprises removal of the piezoelectric layer to reveal the bottom contact pads.

8. A piezoelectric cantilever actuator system array prepared by a process comprising the steps of:

providing a substrate comprising a first bottom surface;

providing a mold comprising a first top surface with first projections;

punching the first projections through the first bottom surface to define anchors, pre-cantilevers, and cavities in the substrate;

providing a cutter with a second bottom surface with second projections; and

stamping a second top surface of the substrate to the pre-cantilevers and define cantilevers and recess areas.

9. A piezoelectric cantilever actuator system array prepared by a process comprising the steps of:

providing a substrate comprising a first bottom surface;

providing a mold comprising a first top surface with first projections;

punching the first projections through the first bottom surface to define anchors, pre-cantilevers, and cavities in the substrate;

fabricating additional circuitry on top of the pre-cantilevers after the providing the substrate, the providing the mold, and the punching;

depositing a bottom electrode layer;

patterning the bottom electrode layer to define bottom contact pads and bottom electrodes corresponding to the pre-cantilevers;

depositing gate dielectric layers; and

depositing a piezoelectric layer on top of the bottom contact pads, the bottom electrodes, and the gate dielectric layers for thin-film transistors (TFTs).

10. The piezoelectric cantilever actuator system array of claim 9, wherein the fabricating further comprises:

depositing a semiconductor layer on top of the piezoelectric layer;

patterning the semiconductor layer to define TFT semiconductor layers for the TFTs;

depositing a top electrode layer; and

patterning the top electrode layer to define top electrodes, connectors, source electrodes for the TFTs, drain electrodes for the TFTs, and top contact pads.

11. The piezoelectric cantilever actuator system array of claim 10, wherein the fabricating further comprises removal of the piezoelectric layer reveal the bottom contact pads.

12. A microelectronic device comprising:

a base;

a first anchor coupled to the base and comprising a first anchor top surface;

a first cantilever coupled to the first anchor and comprising a first cantilever top surface, wherein the base, the first anchor, and the first cantilever are an integral structure formed from the same substrate material;

a first set of active layers coupled to the first anchor and the first cantilever, configured to form a first piezoelectric cantilever actuator with the first cantilever, and covering part of the first anchor top surface and all of the first cantilever top surface;

a second anchor coupled to the base and comprising a second anchor top surface;

a second cantilever coupled to the second anchor and comprising a second cantilever top surface; and

a second set of active layers coupled to the second anchor and the second cantilever, configured to form a second piezoelectric cantilever actuator with the second cantilever, and covering part of the second anchor top surface and all of the second cantilever top surface.

13. The microelectronic device of claim 12, further comprising:

a first cavity coupled to the first anchor and the first cantilever; and

a first recess area coupled to the first cantilever and the first cavity.

14. The microelectronic device of claim 13, wherein the first cantilever comprises:

a first bottom surface substantially defining the first cavity;

a first front surface;

a first left surface; and

a first right surface, wherein the first front surface, the first left surface, and the first right surface substantially define the first recess area.

15. The microelectronic device of claim 14, further comprising:

a second cavity coupled to the second anchor and the second cantilever; and

a second recess area coupled to the second cantilever and the second cavity,

wherein the second anchor is further coupled to the first recess area.

16. The microelectronic device of claim 12, wherein the first set and the second set comprise:

a bottom electrode;

a piezoelectric layer on top of the bottom electrode; and

a top electrode on top of the piezoelectric layer.