Data storage device encoding and interleaving codewords to improve trellis sequence detection

• US 10,063,257 B1
• Filed: 05/13/2016
• Issued: 08/28/2018
• Est. Priority Date: 11/03/2015
• Status: Active Grant

• Current Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Chen, Yiming
• Primary Examiner(s): McMahon, Daniel
• Application Number:
  US15/154,165
• Time in Patent Office: 837 Days
• Field of Search: None
• CPC Class Codes: G11B 2020/1863 wherein the Viterbi algorithm is used for decoding the error correcting code
• CPC Class Codes: G11B 5/59616 Synchronisation; Clocking G11B5/59622 takes precedence
• CPC Class Codes: H03M 13/1102 Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
• CPC Class Codes: H03M 13/1111 Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
• CPC Class Codes: H03M 13/27 using interleaving techniques
• CPC Class Codes: H03M 13/2742 Irregular interleaver wherein the permutation pattern is not obtained by a computation rule, e.g. interleaver based on random generators
• CPC Class Codes: H03M 13/2757 Interleaver with an interleaving rule not provided for in the subgroups H03M13/2703 - H03M13/2753
• CPC Class Codes: H03M 13/356 Unequal error protection [UEP]
• CPC Class Codes: H03M 13/6325 Error control coding in combination with demodulation

Abstract

A data storage device is disclosed comprising a storage medium. First data is encoded into a first codeword comprising a plurality of i-bit symbols, and second data is encoded into a second codeword comprising a plurality of j-bit symbols, wherein i is different than j and a first code rate of the first codeword is less than a second code rate of the second codeword. The first codeword and the second codeword are symbol interleaved to generate an interleaved codeword, and the interleaved codeword is written to the storage medium.

Claims

1. A data storage device comprising:

a storage medium; and

control circuitry configured to;

encode first data into a first codeword comprising a plurality of i-bit symbols;

encode second data into a second codeword comprising a plurality of j-bit symbols, wherein i is different than j and a first code rate of the first codeword is less than a second code rate of the second codeword;

symbol interleave the first codeword and the second codeword to generate an interleaved codeword; and

write the interleaved codeword to the storage medium.

2. The data storage device as recited in claim 1, wherein i is less than j.

3. The data storage device as recited in claim 2, wherein i is one.

4. The data storage device as recited in claim 2, wherein the control circuitry is further configured to:

read the interleaved codeword from the storage medium to generate a read signal;

sample the read signal to generate signal samples;

process the signal samples with a trellis detector to generate a sequence of reliability metrics representing the interleaved codeword;

de-interleave the sequence of reliability metrics into a first set of reliability metrics representing the first codeword and a second set of reliability metrics representing the second codeword;

decode the first set of reliability metrics with a i-bit symbol decoder to generate a third set of reliability metrics representing the first codeword;

decode the second set of reliability metrics with a j-bit symbol decoder to generate a fourth set of reliability metrics representing the second codeword;

interleave the third set of reliability metrics and the fourth set of reliability metrics to generate interleaved reliability metrics representing the interleaved codeword; and

process the interleaved reliability metrics with the trellis detector.

5. The data storage device as recited in claim 4, wherein the control circuitry is further configured to generate the fourth set of reliability metrics as 1-bit reliability metrics for processing with the trellis detector.

6. The data storage device as recited in claim 4, wherein the trellis detector implements a soft-input soft-output Viterbi algorithm.

7. The data storage device as recited in claim 1, wherein the encoding of the first data into the first codeword and the encoding of the second data into the second codeword implement a low density parity check (LDPC) code.

15. The data storage device as recited in claim 1, wherein the control circuitry is further configured to:

read the interleaved codeword from the storage medium to generate a read signal;

process the read signal to generate a sequence of reliability metrics representing the interleaved codeword; and

de-interleave the sequence of reliability metrics to generate a set of reliability metrics representing the first codeword and the second codeword.

16. The data storage device as recited in claim 1, wherein the storage medium is a magnetic or optical disk.

17. The data storage device as recited in claim 1, wherein the storage medium is solid state memory.

18. The data storage device as recited in claim 1, wherein a size of the first codeword is ⅓

a size of the second codeword.

8. A method of operating a data storage device comprising a storage medium and control circuitry, the method comprising:

encoding, with the control circuitry, first data into a first codeword comprising a plurality of i-bit symbols;

encoding, with the control circuitry, second data into a second codeword comprising a plurality of j-bit symbols, wherein i is different than j and a first code rate of the first codeword is less than a second code rate of the second codeword;

interleaving, with the control circuitry, the first codeword and the second codeword to generate an interleaved codeword; and

writing, with the control circuitry, the interleaved codeword to the storage medium.

9. The method as recited in claim 8, wherein i is less than j.

10. The method as recited in claim 9, wherein i is one.

11. The method as recited in claim 9, further comprising:

reading the interleaved codeword from the storage medium to generate a read signal;

sampling the read signal to generate signal samples;

processing the signal samples with a trellis detector to generate a sequence of reliability metrics representing the interleaved codeword;

de-interleaving the sequence of reliability metrics into a first set of reliability metrics representing the first codeword and a second set of reliability metrics representing the second codeword;

decoding the first set of reliability metrics with a i-bit symbol decoder to generate a third set of reliability metrics representing the first codeword;

decoding the second set of reliability metrics with a j-bit symbol decoder to generate a fourth set of reliability metrics representing the second codeword;

interleaving the third set of reliability metrics and the fourth set of reliability metrics to generate interleaved reliability metrics representing the interleaved codeword; and

processing the interleaved reliability metrics with the trellis detector.

12. The method as recited in claim 11, further comprising generating the fourth set of reliability metrics as 1-bit reliability metrics for processing with the trellis detector.

13. The method as recited in claim 11, wherein the trellis detector implements a soft-input soft-output Viterbi algorithm.

14. The method as recited in claim 8, wherein the encoding of the first data into the first codeword and the encoding of the second data into the second codeword implement a low density parity check (LDPC) code.

19. The method as recited in claim 8, further comprising:

reading the interleaved codeword from the storage medium to generate a read signal;

processing the read signal to generate a sequence of reliability metrics representing the interleaved codeword; and

de-interleaving the sequence of reliability metrics to generate a set of reliability metrics representing the first codeword and the second codeword.

20. The method as recited in claim 8, wherein the storage medium is a disk comprising a plurality of servo sectors that define a plurality of servo tracks, and the writing the interleaved codeword comprises writing the interleaved codeword to a first servo sector of the plurality of servo sectors.

21. The method as recited in claim 8, wherein a size of the first codeword is ⅓

a size of the second codeword.