Recessed cavity in printed circuit board protected by LPI

• US 10,064,292 B2
• Filed: 04/08/2016
• Issued: 08/28/2018
• Est. Priority Date: 03/21/2016
• Status: Active Grant

• Current Assignee: Multek Technologies Limited
• Original Assignee: Multek Technologies Limited
• Inventors: Pen, Kwan
• Primary Examiner(s): Cruz, Dimary Lopez
• Assistant Examiner(s): Azam, Muhammed
• Application Number:
  US15/094,372
• Publication Number:
  US 20170273195A1
• Time in Patent Office: 872 Days
• Field of Search: None
• CPC Class Codes: H05K 1/0298 Multilayer circuits
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 1/185 Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit semiconductor chips encapsulated by interconnect and support structures H01L23/5389, H01L24/00
• CPC Class Codes: H05K 2201/09036 Recesses or grooves in insulating substrate recess in metallic substrate H05K2201/09745
• CPC Class Codes: H05K 3/06 the conductive material being removed chemically or electrolytically, e.g. by photo-etch process semi-additive methods H05K3/108
• CPC Class Codes: H05K 3/42 Plated through-holes or plated via connections
• CPC Class Codes: H05K 3/429 Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
• CPC Class Codes: H05K 3/4611 by laminating two or more circuit boards H05K3/4652 takes precedence
• CPC Class Codes: H05K 3/462 characterized by laminating only or mainly similar double-sided circuit boards
• CPC Class Codes: H05K 3/4697 having cavities, e.g. for mounting components H05K3/4691 takes precedence

Abstract

A PCB has multiple stacked layers laminated together, the laminated stack includes regular flow prepreg and includes a recessed cavity, a bottom perimeter of which is formed by a photo definable, or photo imageable, polymer structure having a low adhesion to an underlying conductive layer, such as an LPI mixture. The LPI mixture defines cavity dimensions and enables the use of regular flow prepreg in the laminated stack.

Claims

1. A printed circuit board comprising:

a laminated stack comprising a plurality of non-conductive layers and a plurality of conductive layers, wherein a recessed cavity is formed in the laminated stack, the recessed cavity having cavity side walls and a cavity bottom surface; and

a photo imageable polymer structure formed within the laminated stack, wherein the photo imageable structure forms a perimeter boundary of the recessed cavity within the cavity side walls adjacent to the cavity bottom surface.

2. The printed circuit board of claim 1 wherein the recessed cavity is formed from an outer surface of the laminated stack into the laminated stack.

3. The printed circuit board of claim 1 wherein the photo imageable polymer structure is a liquid photoimage ink (LPI) mixture comprising an LPI mixed with up to 10% by weight silicone base release agent.

4. The printed circuit board of claim 1 wherein the photo imageable polymer structure is formed on a surface of one of the plurality of conductive layers.

5. The printed circuit board of claim 4 wherein the photo imageable polymer structure includes a release agent enabling the photo imageable polymer structure to be pulled apart from the conductive layer after lamination.

6. The printed circuit board of claim 1 wherein one or more of the plurality of non-conductive layers comprise a prepreg layer.

7. The printed circuit board of claim 6 wherein the prepreg layer comprises a regular flow prepreg layer having resin flow greater than about 100 mil.

8. The printed circuit board of claim 1 wherein each of the conductive layers is pattern etched.

9. The printed circuit board of claim 1 further comprising one or more plated through hole vias in the laminated stack.

10. The printed circuit board of claim 1 wherein the cavity bottom surface comprises a conductive layer.

11. The printed circuit board of claim 10 wherein surfaces of the cavity side walls are non-plated.

12. The printed circuit board of claim 10 wherein surfaces of the cavity side walls are plated.