Organic light-emitting diode display and method of driving the same
First Claim
1. An organic light-emitting diode (OLED) display, comprising:
- a display panel comprising a plurality of pixels, each pixel comprising an OLED, an emission timing of each pixel being controlled in response to an EM signal;
a shift register configured to generate an anti-phase EM signal based on gate shift clocks; and
an inverter configured to;
invert a phase of the anti-phase EM signal based on emission shift clocks; and
generate the EM signal,wherein a driving frequency of the shift register and a driving frequency of the inverter are both lower in a low-speed driving mode than in a normal driving mode, andwherein, in the low-speed driving mode, an amplitude of the emission shift clocks is less than an amplitude of the gate shift clocks.
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Abstract
Provided are an organic light-emitting diode (OLED) display and method of driving the same. An OLED display includes: a display panel including a plurality of pixels, each pixel including an OLED, an emission timing of each pixel being controlled in response to an EM signal, a shift register configured to generate an anti-phase EM signal based on gate shift clocks, and an inverter configured to: invert a phase of the anti-phase EM signal based on emission shift clocks, and generate the EM signal, wherein a driving frequency of the shift register and a driving frequency of the inverter are lower in a low-speed driving mode than in a normal driving mode, and wherein in the low-speed driving mode, an amplitude of the emission shift clocks is less than an amplitude of the gate shift clocks.
26 Citations
14 Claims
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1. An organic light-emitting diode (OLED) display, comprising:
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a display panel comprising a plurality of pixels, each pixel comprising an OLED, an emission timing of each pixel being controlled in response to an EM signal; a shift register configured to generate an anti-phase EM signal based on gate shift clocks; and an inverter configured to; invert a phase of the anti-phase EM signal based on emission shift clocks; and generate the EM signal, wherein a driving frequency of the shift register and a driving frequency of the inverter are both lower in a low-speed driving mode than in a normal driving mode, and wherein, in the low-speed driving mode, an amplitude of the emission shift clocks is less than an amplitude of the gate shift clocks. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An organic light-emitting diode (OLED) display, comprising:
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a display panel comprising a plurality of pixels, each pixel comprising an OLED, an emission timing of each pixel being controlled in response to an EM signal; a shift register configured to generate an anti-phase EM signal based on gate shift clocks; and an inverter configured to; invert a phase of the anti-phase EM signal based on emission shift clocks; and generate the EM signal, wherein the shift register is further configured to supply the anti-phase EM signal to an input node of the inverter through an output line, wherein the inverter comprises a ripple suppression capacitor connected between the input node and an input terminal of a gate low voltage, the ripple suppression capacitor being configured to suppress a ripple on the anti-phase EM signal, wherein a driving frequency of the shift register and a driving frequency of the inverter are both lower in a low-speed driving mode than in a normal driving mode, and wherein, in the low-speed driving mode, an amplitude of the emission shift clocks is less than an amplitude of the gate shift clocks. - View Dependent Claims (8, 9, 10, 11)
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12. A method of driving an organic light-emitting diode (OLED) display including a display panel having a plurality of pixels, each pixel including an OLED, an emission timing of each pixel being controlled in response to an EM signal, the method comprising:
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generating, by a shift register, an anti-phase EM signal based on gate shift clocks; and by an inverter; inverting a phase of the anti-phase EM signal based on emission shift clocks; and generating the EM signal, wherein a driving frequency of the shift register and a driving frequency of the inverter are both lower in a low-speed driving mode than in a normal driving mode, and wherein, in the low-speed driving mode, an amplitude of the emission shift clocks is less than an amplitude of the gate shift clocks. - View Dependent Claims (13, 14)
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Specification