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Semiconductor package

  • US 10,068,817 B2
  • Filed: 03/20/2017
  • Issued: 09/04/2018
  • Est. Priority Date: 03/18/2016
  • Status: Active Grant
First Claim
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1. A semiconductor package and die assembly comprising:

  • a package having an exterior surface and an interior space, the interior space defined by;

    a first side wall;

    a second side wall that opposes the first side wall;

    a package floor, the package floor including package floor conductors in the package floor; and

    a package ceiling having an interior side that opposes the package floor, the package ceiling including package ceiling conductors in the package ceiling;

    one or more floor dies comprising semiconductor dies located on the package floor;

    electrical conductors electrically connecting the one or more floor dies to the package floor conductors;

    one or more ceiling dies comprising semiconductor dies located on the package ceiling;

    electrical conductors electrically connecting the one or more ceiling dies to the package ceiling conductors;

    an upper heat sink located on the package ceiling; and

    two or more heat conductors in the package ceiling that extend from the interior side of the package ceiling, through the package ceiling, and connect to the heat sink, the two or more heat conductors being separate elements from the upper heat sink.

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