Semiconductor device and method for manufacturing the same

• US 10,068,926 B2
• Filed: 03/23/2017
• Issued: 09/04/2018
• Est. Priority Date: 05/05/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kimura, Hajime
• Primary Examiner(s): Potter, Roy
• Assistant Examiner(s): PATTON, PAUL E
• Application Number:
  US15/467,231
• Publication Number:
  US 20170194360A1
• Time in Patent Office: 530 Days
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/786 Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]

Abstract

A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region.

Claims

1. A display device comprising:

an oxide semiconductor layer including a channel formation region in a transistor; and

a conductive layer over the oxide semiconductor layer,

wherein the conductive layer includes a first region, a second region, and a third region,

wherein the first region overlaps with a first insulating layer and a second insulating layer, and the first region acts as a pixel electrode,

wherein the second region does not overlap with the second insulating layer, and the second region overlaps with the oxide semiconductor layer with the first insulating layer interposed therebetween,

wherein the third region does not overlap with the second insulating layer and does not overlap with the first insulating layer,

wherein the conductive layer is electrically connected to the transistor in the third region,

wherein the first insulating layer includes an inorganic insulating layer,

wherein a thickness of the second insulating layer is larger than a thickness of the first insulating layer,

wherein the second insulating layer includes an organic resin layer, and

wherein the oxide semiconductor layer includes a region aligning a c-axis approximately perpendicular to a deposition surface.

2. The display device according to claim 1,

wherein the conductive layer further includes a fourth region, and

wherein the fourth region does not overlap with the second insulating layer, and the fourth region overlaps with one of a source electrode and a drain electrode of the transistor with the first insulating layer interposed therebetween.

3. A display device comprising:

an oxide semiconductor layer including a channel formation region in a transistor; and

a conductive layer over the oxide semiconductor layer,

wherein the conductive layer includes a first region, a second region, and a third region,

wherein the first region overlaps with a first insulating layer and a second insulating layer, and the first region acts as a pixel electrode,

wherein the second region does not overlap with the second insulating layer, and the second region overlaps with the oxide semiconductor layer with the first insulating layer interposed therebetween,

wherein the third region does not overlap with the second insulating layer and does not overlap with the first insulating layer,

wherein the conductive layer is electrically connected to the transistor in the third region,

wherein the first insulating layer includes an inorganic insulating layer,

wherein a thickness of the second insulating layer is larger than a thickness of the first insulating layer,

wherein the second insulating layer includes an organic resin layer, and

wherein the second insulating layer include a region acting as a color filter.

4. The display device according to claim 3,

wherein the conductive layer further includes a fourth region, and

wherein the fourth region does not overlap with the second insulating layer, and the fourth region overlaps with one of a source electrode and a drain electrode of the transistor with the first insulating layer interposed therebetween.

5. A display device comprising:

an oxide semiconductor layer including a channel formation region in a transistor; and

a conductive layer over the oxide semiconductor layer,

wherein the conductive layer includes a first region, a second region, and a third region,

wherein the first region overlaps with a first insulating layer and a second insulating layer, and the first region acts as a pixel electrode,

wherein the second region does not overlap with the second insulating layer, the second region overlaps with the oxide semiconductor layer with the first insulating layer interposed therebetween, and the second region acts as one electrode of a capacitor,

wherein the third region does not overlap with the second insulating layer and does not overlap with the first insulating layer,

wherein the conductive layer is electrically connected to the transistor in the third region,

wherein the first insulating layer includes an inorganic insulating layer,

wherein a thickness of the second insulating layer is larger than a thickness of the first insulating layer,

wherein the second insulating layer includes an organic resin layer, and

wherein the second insulating layer include a region acting as a color filter.

6. The display device according to claim 5,

wherein the conductive layer further includes a fourth region, and

wherein the fourth region does not overlap with the second insulating layer, and the fourth region overlaps with one of a source electrode and a drain electrode of the transistor with the first insulating layer interposed therebetween.