Systems and methods for ring-oscillator based operational amplifiers for scaled CMOS technologies

• US 10,075,133 B2
• Filed: 01/17/2017
• Issued: 09/11/2018
• Est. Priority Date: 01/15/2016
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Seamless Microsystems, Inc.
• Inventors: Kuppambatti, Jayanth
• Primary Examiner(s): Chang, Joseph
• Application Number:
  US15/408,058
• Publication Number:
  US 20170207751A1
• Time in Patent Office: 602 Days
• Field of Search: 330253, 331 57, 331 45
• CPC Class Codes: G04F 10/06 by measuring phase G04F10/005 takes precedence
• CPC Class Codes: H03F 1/0205 in transistor amplifiers
• CPC Class Codes: H03F 1/56 Modifications of input or output impedances, not otherwise provided for
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/21 with semiconductor devices only H03F3/245 takes precedence
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03K 3/0315 Ring oscillators
• CPC Class Codes: H03K 3/0322 with differential cells
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation
• CPC Class Codes: H03M 1/60 with intermediate conversion to frequency of pulses

Abstract

An area efficient amplifier that amplifies a continuous-time continuous-amplitude signal and converts it to a discrete-time discrete-amplitude signal. The amplifier includes a first oscillator having an input and a plurality of N outputs and a second oscillator having an input and N outputs. The amplifier includes N phase detectors, each phase detector has a first input, a second input, a first output, and a second output, where each first input of each phase detector is coupled to respective one of the N outputs of the first oscillator, where each second input of each phase detector is coupled to respective one of the N outputs of the second oscillator. The amplifier includes N quantizers, each quantizer has a data input, a clock input, and an output, where each data input of each quantizer is coupled to respective one first output or one second output of the N phase detectors.

Claims

1. An area efficient amplifier, comprising:

a first oscillator having an input and a plurality of N outputs;

a second oscillator having an input and a plurality of N outputs;

a plurality of N phase detectors, each phase detector has a first input, a second input, a first output, and a second output, wherein each first input of each phase detector is coupled to respective one of the plurality of N outputs of the first oscillator, wherein each second input of each phase detector is coupled to respective one of the plurality of N outputs of the second oscillator; and

a plurality of N quantizers, each quantizer has a data input, a clock input, and an output, wherein each data input of each quantizer is coupled to respective (1) one first output of the plurality of N phase detectors or (2) one second output of the plurality of N phase detectors,

wherein the amplifier amplifies a continuous-time continuous-amplitude signal and converts the continuous-time continuous-amplitude signal to a discrete-time discrete-amplitude signal.

2. The amplifier of claim 1, wherein at least one of the first oscillator or the second oscillator is a voltage controlled oscillator.

3. The amplifier of claim 1, wherein at least one of the first oscillator or the second oscillator is a current controlled oscillator.

4. The amplifier of claim 1, wherein at least one of the first oscillator or the second oscillator is a ring oscillator.

5. The amplifier of claim 1, wherein at least one of the first oscillator or the second oscillator is a single-ended oscillator.

6. The amplifier of claim 1, wherein the first oscillator and the second oscillator form a differential oscillator.

7. The amplifier of claim 1, wherein at least one of the plurality of N phase detectors is an exclusive OR gate.

8. The amplifier of claim 1, wherein at least one of the plurality of N quantizers is a D flip-flop.

9. The amplifier of claim 1, wherein at least one of the plurality of N quantizers is a JK flip-flop.

10. The amplifier of claim 1, wherein at least one of the plurality of N quantizers is a toggle flip-flop.

11. An area efficient amplifier, consisting of:

a first oscillator having an input and a plurality of N outputs;

a second oscillator having an input and a plurality of N outputs; and

a plurality of N phase detectors, each phase detector has a first input, a second input, a first output, and a second output, wherein each first input of each phase detector is coupled to respective one of the plurality of N outputs of the first oscillator, wherein each second input of each phase detector is coupled to respective one of the plurality of N outputs of the second oscillator,

wherein the amplifier amplifies a continuous-time continuous-amplitude signal to a continuous-time discrete-amplitude signal.

12. The amplifier of claim 11, wherein at least one of the first oscillator or the second oscillator is a voltage controlled oscillator.

13. The amplifier of claim 11, wherein at least one of the first oscillator or the second oscillator is a current controlled oscillator.

14. The amplifier of claim 11, wherein at least one of the first oscillator or the second oscillator is a ring oscillator.

15. The amplifier of claim 11, wherein at least one of the first oscillator or the second oscillator is a single-ended oscillator.

16. The amplifier of claim 11, wherein the first oscillator and the second oscillator form a differential oscillator.

17. The amplifier of claim 11, wherein at least one of the plurality of N phase detectors is an exclusive OR gate.