Noise reduced capacitive fingerprint sensor and capacitive sensing unit included therein

• US 10,078,776 B2
• Filed: 12/16/2016
• Issued: 09/18/2018
• Est. Priority Date: 12/16/2016
• Status: Active Grant

• Current Assignee: SunASIC Technologies
• Original Assignee: SunASIC Technologies
• Inventors: Lin, Chi Chou, He, Zheng Ping
• Primary Examiner(s): STREGE, JOHN B
• Application Number:
  US15/381,182
• Publication Number:
  US 20180173919A1
• Time in Patent Office: 641 Days
• CPC Class Codes: G06V 40/1306 non-optical, e.g. ultrasonic or capacitive sensing
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H03K 17/9622 using a plurality of detectors, e.g. keyboard
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response

Abstract

A capacitive fingerprint sensor which includes capacitive sensing units is disclosed. Each of the capacitive sensing unit includes a sensing electrode; a first switch; a voltage follower; and a reference capacitor. The voltage follower includes an adjustable current source, for providing at least two distinct current levels; and a MOS transistor. The MOS transistor includes a source node, connected to ground via the adjustable current source and serves as an output node of the voltage follower; a gate node, connected to the sensing electrode and serves as an input node of the voltage follower; a drain node, connected to a power source, for providing power to the voltage follower; and a bulk node, connected to the source node.

Claims

1. A capacitive sensing unit for a capacitive fingerprint sensor, comprising:

a sensing electrode;

a first switch, for providing a constant bias voltage to all components connected to the sensing electrode while being switched on;

a voltage follower, comprising;

an adjustable current source, for providing at least two distinct current levels; and

a MOS transistor, comprising;

a source node, connected to ground via the adjustable current source and serves as an output node of the voltage follower;

a gate node, connected to the sensing electrode and serves as an input node of the voltage follower;

a drain node, connected to a power source, for providing power to the voltage follower; and

a bulk node, connected to the source node; and

a reference capacitor, formed between the output node of the voltage follower and the sensing electrode.

2. The capacitive sensing unit according to claim 1, wherein the adjustable current source provides a first current level for setting up the bias voltage to the voltage follower and at least a second current level for reading the output voltage.

3. The capacitive sensing unit according to claim 1, wherein the at least two distinct current levels are constant current levels.

4. The capacitive sensing unit according to claim 1, wherein the adjustable current source comprises:

a first constant current source;

a second constant current source; and

a second switch, for switching between the at least two distinct current levels.

5. The capacitive sensing unit according to claim 4, wherein the adjustable current source further comprises a third switch, for switching between the at least two distinct current levels.

6. The capacitive sensing unit according to claim 1, wherein the adjustable current source is a bias voltage controlled current mirror.

7. The capacitive sensing unit according to claim 1, wherein the adjustable current source is a current controlled current mirror.

8. The capacitive sensing unit according to claim 1, wherein the sensing electrode is a conductive plate.

9. The capacitive sensing unit according to claim 1, further comprising:

a lower conducting layer connected to the output node of the voltage follower; and

at least one insulating layer, formed between the sensing electrode and the lower conducting layer,

wherein the reference capacitor is formed between the conductive plate and the lower conducting layer.

10. The capacitive sensing unit according to claim 1, wherein the MOS transistor is operated at least two distinct operation points in the saturation region, and the process variation of the sensing unit can be compensated by having the design parameters to meet the relationship:

11. The capacitive sensing unit according to claim 1, wherein a capacitor is formed between the sensing electrode and an object while the object is detected by the capacitive sensing unit;

one node of the capacitor is formed by the sensing electrode and another node is formed by the surface of the object;

the object is connected to ground; and

the MOS transistor is operated in saturation region.

12. A capacitive fingerprint sensor, comprising a plurality of capacitive sensing units according to claim 1 to form a fingerprint sensing array.

13. A sensing circuit, for measuring a capacitance formed between an object and the sensing circuit, comprising:

a sensing electrode, wherein the capacitance is formed between the object and the sensing electrode;

an output node, wherein an output voltage is measured at the output node;

a reference capacitor, wherein one node of the reference capacitor is connected to the sensing electrode and the other node is connected to the output node;

a MOS transistor, comprising;

a source node;

a gate node, connected to the sensing electrode;

a drain node, connected to a power source for providing power to the transistor; and

a bulk node, connected to the source node; and

an adjustable current source, formed between the source node of the MOS transistor and ground, for providing at least two distinct current levels to the MOS transistor,

wherein the MOS transistor is operated in the saturation region;

wherein the MOS transistor and the adjustable current source together behaves as a voltage follower; and

wherein the capacitance has one node connected to ground, and another node connected to the sensing electrode.

14. The sensing circuit according to claim 13, wherein the at least two distinct current levels comprise a first current level for providing a constant bias current level for setting up the bias voltage to the voltage follower;

and at least a second current level for reading the output voltage.