MOSFET active area and edge termination area charge balance
First Claim
1. A semiconductor device, comprising:
- an active area, comprising;
a plurality of active area trenches;
a source region adjacent one or more sidewalls of said plurality of active area trenches;
a gate region located adjacent to and vertically underneath said source region; and
a drain region located adjacent to and vertically underneath said gate region;
andan edge termination area, comprising;
a gate pickup trench; and
a plurality of edge termination area trenches,wherein a first plurality of implants are made at the bottom of trenches formed in both said active area and said edge termination area, and wherein a second plurality of implants are made at said bottom of said trenches formed in said active area and causes said implants made at the bottom of said trenches formed in said active area to reach a predetermined concentration.
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Accused Products
Abstract
A method for fabricating a MOSFET having an active area and an edge termination area is disclosed. The method includes forming a first plurality of implants at the bottom of trenches located in the active area and in the edge termination area. A second plurality of implants is formed at the bottom of the trenches located in the active area. The second plurality of implants formed at the bottom of the trenches located in the active area causes the implants formed at the bottom of the trenches located in the active area to reach a predetermined concentration. In so doing, the breakdown voltage of both the active and edge termination areas can be made similar and thereby optimized while maintaining advantageous RDson.
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Citations
20 Claims
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1. A semiconductor device, comprising:
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an active area, comprising; a plurality of active area trenches; a source region adjacent one or more sidewalls of said plurality of active area trenches; a gate region located adjacent to and vertically underneath said source region; and a drain region located adjacent to and vertically underneath said gate region; and an edge termination area, comprising; a gate pickup trench; and a plurality of edge termination area trenches, wherein a first plurality of implants are made at the bottom of trenches formed in both said active area and said edge termination area, and wherein a second plurality of implants are made at said bottom of said trenches formed in said active area and causes said implants made at the bottom of said trenches formed in said active area to reach a predetermined concentration. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 14, 20)
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10. A semiconductor device, comprising:
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an active area, comprising; a plurality of active area trenches; a source region adjacent one or more sidewalls of said plurality of active area trenches; a gate region located adjacent to and vertically underneath said source region; and a drain region located adjacent to and vertically underneath said gate region; and an edge termination area, comprising; a gate pickup trench; and a plurality of edge termination area trenches, wherein a first plurality of implants are made at the bottom of trenches formed in both said active area and said edge termination area, and wherein a second plurality of implants are made at said bottom of said trenches formed in said active area. - View Dependent Claims (11, 12, 13)
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15. A semiconductor device, comprising:
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an active area, comprising; a plurality of active area trenches; and an edge termination area, comprising; a plurality of edge termination area trenches, wherein a first plurality of implants are made at the bottom of trenches formed in both said active area and said edge termination area, and wherein a second plurality of implants are made at said bottom of said trenches formed in said active area. - View Dependent Claims (16, 17, 18, 19)
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Specification