High voltage zero QRR bootstrap supply

• US 10,084,445 B2
• Filed: 04/26/2017
• Issued: 09/25/2018
• Est. Priority Date: 10/10/2014
• Status: Active Grant

• Current Assignee: Efficient Power Conversion Corporation
• Original Assignee: Efficient Power Conversion Corporation
• Inventors: de Rooij, Michael A., Strydom, Johan T., Reusch, David C.
• Primary Examiner(s): Puentes, Daniel
• Application Number:
  US15/497,637
• Publication Number:
  US 20170230046A1
• Time in Patent Office: 517 Days
• CPC Class Codes: H03K 17/04206 in field-effect transistor switches
• CPC Class Codes: H03K 17/165 by feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 17/567 Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
• CPC Class Codes: H03K 17/6871 the output circuit comprising more than one controlled field-effect transistor
• CPC Class Codes: H03K 19/017509 Interface arrangements
• CPC Class Codes: H03K 2217/0063 High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load
• CPC Class Codes: H03K 2217/0072 Low side switches, i.e. the lower potential [DC] or neutral wire [AC] being directly connected to the switch and not via the load
• CPC Class Codes: H03K 2217/0081 Power supply means, e.g. to the switch driver

Abstract

An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.

Claims

1. An electrical circuit arranged in a half bridge topology, comprising:

a high side transistor;

a low side transistor;

a first gate driver and a level shifter electrically coupled to a gate of the high side transistor;

a second gate driver electrically coupled to a gate of the low side transistor;

a capacitor electrically coupled in parallel with the first gate driver and the level shifter;

a voltage source electrically coupled to an input of the first gate driver and the level shifter and to an input of the second gate driver; and

,

a bootstrap device electrically coupled between the voltage source and the capacitor, wherein the bootstrap device is a GaN field-effect transistor synchronously switched with the low-side transistor.

2. The electrical circuit of claim 1, wherein the bootstrap device is a depletion mode transistor, and a gate of the depletion mode transistor is electrically coupled to the output of the gate driver.

3. The electrical circuit of claim 2, wherein a drain of the depletion mode transistor is electrically coupled to the input of the gate driver and level shifter.

4. The electrical circuit of claim 1, wherein the bootstrap device is an enhancement mode transistor.

5. The electrical circuit of claim 4, wherein the enhancement mode transistor is unclamped.

6. The electrical circuit of claim 4, wherein the enhancement mode transistor is clamped with a Zener diode in parallel with the capacitor.

7. The electrical circuit of claim 4, wherein a higher voltage is supplied to the enhancement mode transistor than is supplied to the gate driver.

8. The electrical circuit of claim 4, further comprising a regulator in electrical communication with the gate driver.

9. The electrical circuit of claim 6, further comprising a resistor in series between a drain of the enhancement mode transistor and the Zener diode.

10. The electrical circuit of claim 6, wherein the resistor is integrated into the enhancement mode transistor.

11. The electrical circuit of claim 4 wherein the enhancement mode transistor is clamped with two enhancement mode GaN field-effect transistors connected in series with a gate of each shorted to their respective sources.

12. The electrical circuit of claim 1, further comprising:

a diode electrically coupled between the source voltage and a gate of the bootstrap transistor; and

, a second capacitor electrically coupled between the gate of the bootstrap transistor and an output of the gate driver.

13. The electrical circuit of claim 1, wherein the bootstrap device is integrated with the high side and low side transistors.