Image sensor for improving linearity of analog-to-digital converter and image processing system including the same

• US 10,084,982 B2
• Filed: 03/31/2016
• Issued: 09/25/2018
• Est. Priority Date: 04/10/2015
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Jae Hong, Lim, Seung Hyun, Cho, Han Kook, Lee, Dong Hun, Ham, Seog Heon
• Primary Examiner(s): Haskins, Twyler
• Assistant Examiner(s): Garces-Rivera, Angel L
• Application Number:
  US15/087,043
• Publication Number:
  US 20160301891A1
• Time in Patent Office: 908 Days
• CPC Class Codes: H04N 25/677 for reducing the column or line fixed pattern noise
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 25/772 comprising A/D, V/T, V/F, I/T or I/F converters
• CPC Class Codes: H04N 25/78 Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Abstract

An image sensor and an image processing system including the same are provided. The image sensor includes a pixel array including a plurality of pixels each connected to one of first through m-th column lines to output a pixel signal, where “m” is an integer of at least 2; analog-to-digital converters each configured to receive the pixel signal corresponding to one of the first through m-th column lines, to compare the pixel signal with a ramp signal, and to convert the pixel signal to a digital pixel signal; and a blocking circuit connected to an input terminal of at least one of the analog-to-digital converters to block an influence of an operation of others among the analog-to-digital converters.

Claims

1. An image sensor comprising:

a pixel array comprising a plurality of pixels, each pixel of the plurality of pixels being connected to one of first through m-th column lines to output a pixel signal, where “

m”

is an integer of at least 2;

a plurality of analog-to-digital converters, each analog-to-digital converter of the plurality of analog-to-digital converters being configured to receive the pixel signal corresponding to one of the first through m-th column lines, to compare the pixel signal with a ramp signal, and to convert the pixel signal to a digital pixel signal;

a ramp signal generator configured to generate the ramp signal; and

a ramp signal buffer configured to buffer and output the ramp signal; and

a blocking circuit connected between the ramp signal buffer and an input terminal of at least one analog-to-digital converter of the plurality of analog-to-digital converters to block an influence of an operation of other analog-to-digital converters among the plurality of analog-to-digital converters.

2. The image sensor of claim 1, wherein the blocking circuit comprises a plurality of buffers, each buffer of the plurality of buffers being connected between an input terminal of a corresponding analog-to-digital converter of the plurality of analog-to-digital converters and the ramp signal buffer.

3. The image sensor of claim 1, wherein the plurality of analog-to-digital converters are divided into at least two groups, the blocking circuit comprises a plurality of buffers, and each buffer of the plurality of buffers is connected between a corresponding group of the at least two groups and the ramp signal buffer.

4. The image sensor of claim 2, wherein each buffer of the plurality of buffers comprises an N-channel metal oxide semiconductor (NMOS) transistor which is connected between a power supply voltage and the input terminal of the corresponding analog-to-digital converter, and has a gate which receives the ramp signal.

5. The image sensor of claim 2, wherein each buffer of the plurality of buffers comprises a P-channel metal oxide semiconductor (PMOS) transistor which is connected between the input terminal of the corresponding analog-to-digital converter and a ground voltage, and has a gate which receives the ramp signal.

6. The image sensor of claim 2, wherein each buffer of the plurality of buffers comprises:

a first P-channel metal oxide semiconductor (PMOS) transistor connected between a power supply voltage and a first node;

a second PMOS transistor connected between the power supply voltage and a second node;

a first N-channel metal oxide semiconductor (NMOS) transistor which is connected between the first node and a common node, and has a gate which receives the ramp signal;

a second NMOS transistor which is connected between the second node and the common node and has a gate connected to the input terminal of the corresponding analog-to-digital converter; and

a current source connected between the common node and a ground voltage.

7. The image sensor of claim 1, wherein each analog-to-digital converter of the plurality of analog-to-digital converters comprises:

a comparator configured to compare the pixel signal with the ramp signal to generate a comparison signal; and

a counter configured to generate the digital pixel signal according to the comparison signal.

8. The image sensor of claim 7, wherein a number of the pixels is at least ten million and an operating speed of the counter is at least 1 GHz.

9. An image sensor comprising:

a pixel array comprising a plurality of pixels, each pixel of the plurality of pixels being connected to one of first through m-th column lines to output a pixel signal, where “

m”

is an integer of at least 2;

a ramp signal generator configured to generate a ramp signal;

a ramp signal buffer configured to buffer and output the ramp signal;

a plurality of comparators, each comparator of the plurality of comparators being configured to receive a pixel signal of the pixel signals which corresponds to one of the first through m-th column lines, to compare the pixel signal with the ramp signal, and to generate a comparison signal;

a plurality of counters each configured to generate a digital signal according to the comparison signal; and

a blocking circuit connected between an output terminal of the ramp signal buffer and an input terminal of at least one comparator of the plurality of comparators,

wherein each comparator of the plurality of comparators receives the ramp signal through the blocking circuit and compares the ramp signal with the pixel signal.

10. The image sensor of claim 9, wherein the blocking circuit comprises a plurality of buffers, each buffer of the plurality of buffers being connected between the input terminal of a corresponding comparator of the comparators and the ramp signal buffer.

11. The image sensor of claim 9, wherein the blocking circuit comprises a plurality of buffers, each buffer of the plurality of buffers being connected between the input terminals of at least two comparators of the comparators and the ramp signal buffer.

12. An image sensor comprising:

a ramp signal generator that comprises an output buffer and is configured to generate a ramp signal;

a plurality of analog-to-digital converters, each analog-to-digital converter of the plurality of analog-to-digital converters being configured to receive a pixel signal, to compare the pixel signal with the ramp signal, and to convert the pixel signal to a digital pixel signal; and

a blocking circuit connected between the ramp signal generator and the plurality of analog-to-digital converters.

13. The image sensor of claim 12, wherein the blocking circuit comprises a plurality of buffers connected in common to the ramp signal generator.

14. The image sensor of claim 13, wherein a corresponding buffer of the plurality of buffers is provided for each analog-to-digital converter of the analog-to-digital converters in a one-to-one relationship.

15. The image sensor of claim 14, wherein the buffer isolates the analog-to-digital converter to which the buffer is connected from the ramp signal generator.

16. The image sensor of claim 13, wherein the plurality of analog-to-digital converters are divided at least two groups, and a buffer is provided for each group of the at least two groups.

17. The image sensor of claim 16, wherein the buffer isolates the group of analog-to-digital converters to which the buffer is connected from the ramp signal generator.

18. The image sensor of claim 13, wherein each buffer of the plurality of buffers comprises a transistor and a current source.

19. The image sensor of claim 13, wherein each buffer of the plurality of buffers comprises an analog buffer that has a first input terminal connected to the ramp signal generator, and a second input terminal connected to an output terminal of the buffer.