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Display device

  • US 10,088,944 B2
  • Filed: 06/27/2016
  • Issued: 10/02/2018
  • Est. Priority Date: 07/01/2015
  • Status: Active Grant
First Claim
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1. A display device comprising:

  • a plurality of common electrodes extending in a first direction and arranged in parallel with each other;

    a plurality of detection electrodes extending in a second direction crossing the first direction and arranged in parallel with each other;

    a common-electrode drive circuit including a plurality of shift registers connected in series to each other and a plurality of switch circuits electrically connected to the shift registers, respectively; and

    a driver which outputs four-phase clock signals and a touch-drive signal to control the common-electrode drive circuit,whereineach of the shift registers is configured to transfer a shift signal, and a reset operation of the each shift register is controlled by predetermined two of the four-phase clock signals,each of the switch circuits connects a signal line from the driver to a common electrode or electrodes of an associated block based on a shift signal output from an associated shift register for outputting the touch-drive signal,the each switch circuit causes the touch-drive signal from the driver to be supplied to the common electrode or electrodes of the block during a period from time at which the shift signal is output from the associated shift register to time at which a predetermined one of the four-phase clock signals is input,each of the switch circuits supplies the touch-drive signal to the signal line when the touch-drive signal is input from the driver, and disconnects the signal line from the common electrode or electrodes of the block when the predetermined one of the four-phase clock signals is input from the driver,the driver successively and repeatedly outputs first to fourth clock signals that are the four-phase clock signals, andwhere a clock signal for controlling a transfer operation of the shift register is an Nth clock signal, a clock signal for controlling the reset operation of the shift register is an Mth clock signal, and a clock signal to be input to the switch circuit connected to the shift register is a Kth clock signal, N, M and K are integers of 4 or less, and the following relationships are satisfied;


    (N+2)≡

    M mod 4when M≡

    1 mod 4 or M≡

    2 mod 4, K=4, andwhen M≡

    3 mod 4 or M≡

    0 mod 4, K=2.

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